7902 Group User’s Manual
APPENDIX
21-14
Appendix 2. Control registers
UART0 transmit/receive control register 0 (Address 3416)
UART1 transmit/receive control register 0 (Address 3C16)
0
1
2
3
4
5
6
7
BRG count source select bits
CTS/RTS function select bit
(Note 1)
Transmit register empty flag
CTS/RTS enable bit
UARTi receive interrupt mode
select bit
CLK polarity select bit
(This bit is used in the clock
synchronous serial I/O mode.)
(Note 2)
Transfer format select bit
(This bit is used in the clock
synchronous serial I/O mode.)
(Note 2)
b7 b6 b5 b4 b3 b2 b1 b0
0 0 : Clock f2
0 1 : Clock f16
1 0 : Clock f64
1 1 : Clock f512
0 : The CTS function is selected.
1 : The RTS function is selected.
0 : Data is present in the transmit register.
(Transmission is in progress.)
1 : No data is present in the transmit register.
(Transmission is completed.)
0 : The CTS/RTS function is enabled.
1 : The CTS/RTS function is disabled.
0 : Reception interrupt
1 : Reception error interrupt
0 : At the falling edge of the transfer clock, transmit
data is output; at the rising edge of the transfer
clock, receive data is input.
When not in transferring, pin CLKi’s level is “H.”
1 : At the falling edge of the transfer clock, transmit
data is output; at the falling edge of the transfer
clock, receive data is input.
When not in transferring, pin CLKi’s level is “L.”
0 : LSB (Least Significant Bit) first
1 : MSB (Most Significant Bit) first
b1 b0
Notes 1: Valid when the CTS/RTS enable bit (bit 4) is “0” and CTSi/RTSi separate select bit (bit 0 or 1 at address AC16) is “0.”
2: Fix these bits to “0” in the UART mode or when serial I/O is disabled.
0
1
0
RW
RO
RW
Bit name
Bit
Function
At reset
R/W
UART0 transmit/receive control register 1 (Address 3516)
UART1 transmit/receive control register 1 (Address 3D16)
0
1
2
3
4
5
6
7
Transmit enable bit
Transmit buffer empty flag
Receive enable bit
Receive complete flag
Overrun error flag
Framing error flag
(Note)
(Valid in UART mode)
Parity error flag
(Note)
(Valid in UART mode)
Error sum flag
(Note)
(Valid in UART mode)
b7 b6 b5 b4 b3 b2 b1 b0
0 : Reception disabled
1 : Reception enabled
0 : No data is present in the receive buffer register
1 : Data is present in the receive buffer register
Note: Bits 5 to 7 are invalid in the clock synchronous serial I/O mode.
0 : Transmission disabled
1 : Transmission enabled
0 : Data is present in the transmit buffer register
1 : No data is present in the transmit buffer register
0 : No parity error
1 : Parity error detected
0 : No error
1 : Error detected
0 : No overrun error
1 : Overrun error detected
0 : No framing error
1 : Framing error detected
0
1
0
RW
RO
RW
RO
Bit name
Bit
Function
At reset
R/W
Reference
12-7
Reference
12-9