參數(shù)資料
型號(hào)： M37754S4CHP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100
封裝： 0.50 MM PITCH, FINE PITCH, PLASTIC, QFP-100
文件頁數(shù)： 85/114頁
文件大?。?/td> 1116K
代理商： M37754S4CHP
72
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 85 Processor modes and ports P0 to P4, P10 and P11
__
Notes 1 : E signal is not output in the memory expansion and microprocessor modes.
__
2 : The signal output stop disable bit (bit 4 of particular function select register 0) can stop E output in the single-chip mode and
φ1 output in the micro-
___
processor mode. Similarly, when accessing the internal memory in the memory expansion and microprocessor modes, RD and WR output can be
fixed to “H”. Refer to Table 8 for details.
PM1
PM0
Mode
Port
E/RD
Port P0
Port P1
Port P2
Port P3
Port P4
BYTE = “L”
BYTE = “H”
BYTE = “L”
0
Single-chip mode
Clock
φ 1 is output from P42 when bit 7 of
processor mode register 0 is “1”.
0
1
Memory expansion mode (Note 1)
Clock
φ 1 is output from P42 when bit 7 of
processor mode register 0 is “1.”
1
0
Microprocessor mode (Note 1)
Same as left
Clock
φ1 is output from P42 regardless of
bit 7 of processor mode register 0 ; others
are the same as left (Note 2)
BYTE = “H”
Condition except following
When multiplex bus select bit is “1” and
___
accessing CS4 area
E
P00
to
P27
I/O port
E
P100
to
P107
I/O port
E
P110
to
P117
I/O port
P30
to
P33
E
I/O port
E
I/O port
E
P00
to
P27
Address A0 to A19,A23
P100
to
P107
E
P100
to
P107
E
Data
(odd, even)
P100
to
P107
E
Data
(odd, even)
Address
LA0 to LA7
P110
to
P117
E
Data (odd)
P110
to
P117
I/O port
P30
P31
P32
WR
BHE
ALE
P33
HLDA
(Note 2)
E
P40
P41
HOLD input
RDY input
P42
to
P47
I/O port
E
Port
P10
Port
P11
E/RD
RD (Note 2)
E/RD
E (Note 1)
Same as left
P40
to
P47
Data (even)
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