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參數(shù)資料
| 型號(hào)： | M37754S4CHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 0.50 MM PITCH, FINE PITCH, PLASTIC, QFP-100 |
| 文件頁(yè)數(shù)： | 71/114頁(yè) |
| 文件大?。?/td> | 1116K |
| 代理商： | M37754S4CHP |
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MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
6
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Functions
I/O
Input/
Output
Name
Pin
P100 – P107 I/O port P10
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, these pins become data I/O pins and
operate as follows:
(1) When using 16-bit width as external data bus width:
Accessing external memory
<When reading>
Pins’ value is input into low-order internal data bus (DB0 to DB7).
<When writing>
Value of low-order internal data bus (DB0 to DB7) is output to these pins.
Accessing internal memory
<When reading>
These pins become high impedance.
<When writing>
Value of internal data bus is output to these pins.
(2) When using 8-bit width as external data bus width:
Accessing external memory
<When reading>
Pins’ value is input into internal data bus. The value is input into low-order
internal data bus (DB0 to DB7) when accessing an even address; it is input
into high-order internal data bus (DB8 to DB15) when accessing an odd
address.
<When writing>
Value of internal data bus is output to these pins. The value of low-order
internal data bus (DB0 to DB7) is output when accessing an even address;
the value of high-order internal data bus (DB8 to DB15) is output when
accessing an odd address.
Accessing internal memory
<When reading>
These pins become high impedance.
<When writing>
Value of internal data bus is output to these pins.
When the external bus width is 8 bits, the mode where low-order address
___
(LA0 – LA7) is output when RD or WR output is “H” and data (D0 – D7) is
___
input/output when RD or WR output is “L” can be selected in specified
external memory area access cycle.
In single-chip mode, these pins have the same functions as port P0. In memory
expansion mode or microprocessor mode, these pins operate as follows:
(1) When using 16-bit width as external data bus width
Accessing external memory
<When reading>
The value is input into high-order internal data bus (DB8 to DB15) when
accessing an odd address; these pins enter high impedance state when not
accessing an odd address.
<When writing>
Value of high-order internal data bus (DB8-DB15) is output to these pins.
Accessing internal memory
<When reading>
These pins enter high impedance state.
<When writing>
Value of internal data bus is output to these pins.
(2) When using 8-bit width as external data bus width
These pins become I/O port P110 – P117.
P110 – P117
I/O port P11
I/O
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37754S4CHP | 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100 |
| M37754M8C-XXXGP | 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100 |
| M37777E9AGS | 16-BIT, UVPROM, 16 MHz, MICROCONTROLLER, CQCC100 |
| M34550M6A-XXXFP | 4-BIT, MROM, 1.6 MHz, MICROCONTROLLER, PQFP80 |
| M37776M5AXXXGP | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP100 |
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| M3775RK-C0.50B | 制造商:Bonitron 功能描述:OVERVOLTAGE BRAKING RESISTOR |
| M3775RK-C0.50C | 制造商:Bonitron 功能描述:OVERVOLTAGE BRAKING RESISTOR |
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