參數(shù)資料
型號(hào): M37754M8C-XXXHP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP100
封裝: 0.50 MM PITCH, FINE PITCH, PLASTIC, QFP-100
文件頁數(shù): 30/114頁
文件大?。?/td> 1116K
代理商: M37754M8C-XXXHP
MITSUBISHI MICROCOMPUTERS
M37754M8C-XXXGP, M37754M8C-XXXHP
M37754S4CGP, M37754S4CHP
22
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
___
The INT3 interrupt can function as the key input interrupt by setting
___
bits 7 and 6 of the INT3 interrupt control register. The key input inter-
__
rupt uses inputs KI3 to KI0 or inputs KI4 to KI0. Figure 10 shows the
interrupt control register bit configuration. Figure 15 shows the par-
ticular function select register 1 bit configuration, and Figure 16
___
shows the INT3/key input interrupt input circuit block diagram.
___
When the INT3 interrupt control register’s bit 7 is “0” and its bit 6 is
___
“0”, a signal from the INT3 pin is connected to the INT3 interrupt con-
___
trol circuit and INT3 external interrupt is normally performed.
___
When the INT3 interrupt control register’s bit 7 is “1” and its bit 6 is
__
“0”, signals from the KI3 to KI0 pins, which correspond to ports P57 to
P54, are inverted and then the logical sum of these signals is con-
___
nected to the INT3 interrupt control circuit. In this case, the external
__
interrupt which uses the KI3 to KI0 pins is performed.
___
When the INT3 interrupt control register’s bit 7 is “1” and its bit 6 is
__
“1”, signals from the KI4 pin, which corresponds to port P95, KI3 to
__
KI0 pins, which correspond to ports P57 to P54, are inverted and then
___
the logical sum of these signals is connected to the INT3 interrupt
__
control circuit. In this case, the external interrupt which uses the KI4
__
to KI0 pins is performed.
When using the above key input interrupt, select the edge sense
___
which uses the falling edge from “H” to “L” with the INT3 interrupt
control register so that an interrupt request can occur by inputting “L”
__
to each of the KI3 to KI0 pins or the KI4 to KI0 pins. The interrupt vec-
___
tor is common to the INT3 interrupt’s one. Additionally, pull-up resis-
__
tor (transistors) can be added to the KI4 to KI0 pins by setting the
contents of the particular function select register 1’s bits 7 and 6 and
setting “0” to each bit of the corresponding port’s direction register.
___
Fig. 16 INT3/key input interrupt input circuit block diagram
Pull-up select bit 1
Pull-up select bit 0
Key input interrupt select bit 0
(Bit 6 of INT3 interrupt control register)
Port P95 direction register
P57/TA3IN/KI3
Pull-up
transistor
Port P57 direction
register
Port P56 direction
register
Port P55 direction
register
Port P54 direction
register
P95/INT3/KI4
P56/TA3OUT/KI2
P55/TA2IN/KI1
P54/TA2OUT/KI0
INT3 interrupt control register
(Address 6F16)
When the key input interrupt
is selected, select the edge
sense which uses falling edge
from “H” to “L”.
Interrupt control circuit
INT3 interrupt request
Key input interrupt select bit 1
0
1
Bit 7 of INT3 interrupt
control register
Pull-up
transistor
Pull-up
transistor
Pull-up
transistor
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