參數(shù)資料
型號(hào)： M37733MHBXXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù)： 49/92頁(yè)
文件大?。?/td> 1725K
代理商： M37733MHBXXXFP
50
MITSUBISHI MICROCOMPUTERS
M37733MHBXXXFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 58 Relationship between ports P0 to P4 and processor modes
Note.
The signal output disable selection bit (bit 6 of the oscillation circuit control register 0) can stop the E signal output in the single-chip
mode and the
φ 1 output in the microprocessor mode. In the memory expansion mode or the microprocessor mode, signal E can also
be fixed to “H” when the internal memory area is accessed.
PM1
0
1
0
1
Single-chip Mode
Memory Expantion Mode
Evaluation Chip Mode
Microprocessor
Mode
Same as left
PM0
Mode
E
(Note)
I/O Port
In this case, bit 7 of the processor
mode register 0 is “0”
In this case, bit 7 of the processor
mode register 0 is “0”
In this case, bit 7 of the processor
mode register 0 is “1”
In this case, bit 7 of the processor
mode register 0 is “1”
P07
P00
Port
Port P0
Port P3
Port P4
Port
P1
Port
P2
BYTE =“L”
BYTE =“H”
BYTE =“L”
BYTE =“H”
~
E
(Note)
Address A7~A0
P07
A15~A8
P00
~
E
Address
Data(odd)
P17
P10
~
P17
P10
~
E
Address
Ports P4, P5 and their direction
registers are treated as 16-bit wide
bus.
Ports P4, P5 and their direction
registers are treated as 16-bit wide
bus.
Data(odd)
P17
P10
~
E
P27
P20
~
E
P27
P20
~
E
P33
P30
~
E
P47
P40
P42
φ 1
~
E
I/O Port
P47
P42
P41
P40
P42
~
E
P47
P46
P45
P44
P43
P42
P41
P40
E
Address A15~A8
P17
P10
~
E
Address
Data
(even)
Address
Data
(even, odd)
P27
P20
~
E
P27
P20
~
E
P33
HLDA
ALE
P32
P31
P30
A23~A16
A15~A8
Address
Data
(even, odd)
A23~A16
HOLD
BHE
DBC
VPA
VDA
QCL
MX
φ 1
RDY
HOLD
R/W
RDY
Same as above except P42
Same as left
except for port
P42 which out-
puts
φ 1 inde-
pendent of bit
7 of the pro-
cessor
mode
register 0 (Note)
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