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CENTRAL PROCESSING UNIT (CPU)
2.1 Central processing unit
2–4
7721 Group User’s Manual
2.1.4 Stack pointer (S)
The stack pointer (S) is a 16-bit register. It is used for a subroutine call or an interrupt. It is also used when
addressing modes using the stack are executed. The contents of S indicate an address (stack area) for
storing registers during subroutine calls and interrupts. Stack area is selected by the stack bank select bit
described later (bit 7 at address 5E16). The stack area is specified to bank 016 when the stack bank select
bit is “0,” and the stack area is specified to bank FF16 when it is “1.”
When an interrupt request is accepted, the microcomputer stores the contents of the program bank register
(PG) at the address indicated by the contents of S and decrements the contents of S by 1. Then the
contents of the program counter (PC) and the processor status register (PS) are stored. The contents of
S after accepting an interrupt request is equal to the contents of S decremented by 5 before the accepting
of the interrupt request. (Refer to “Figure 2.1.2.”)
When completing the process in the interrupt routine and returning to the original routine, the contents of
registers stored in the stack area are restored into the original registers in the reverse sequence (PS
→PC→PG)
by executing the RTI instruction. The contents of S is returned to the state before accepting an interrupt
request.
The same operation is performed during a subroutine call, however, the contents of PS is not automatically
stored. (The contents of PG may not be stored. This depends on the addressing mode.)
The user should store registers other than those described above with software when the user needs them
during interrupts or subroutine calls.
Additionally, initialize S at the beginning of the program because its contents are undefined at reset. The
stack area changes when subroutines are nested or when multiple interrupt requests are accepted. Therefore,
make sure of the subroutine’s nesting depth not to destroy the necessary data.
Note: Refer to “7700 Family Software Manual” for addressing modes.
Fig. 2.1.2 Stored registers of the stack area
q “S” is the initial address that the stack pointer (S)
indicates at accepting an interrupt request.
The S’s contents become “S–5” after storing the
above registers.
Address
S–4
S–3
S–2
S–1
S
Stack area
S–5
Processor status register’s low-order byte (PSL)
Processor status register’s high-order byte (PSH)
Program counter’s low-order byte (PCL)
Program counter’s high-order byte (PCH)
Program bank register (PG)