參數(shù)資料
型號(hào)： M37643F8HP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 12 MHz, MICROCONTROLLER, PQFP80
封裝： 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁數(shù)： 95/120頁
文件大小： 1253K
代理商： M37643F8HP
76
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7643 Group
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to
change.
Notes 1: Test conditions: IOHL =
± 5mA, CL = 50 pF
2: twL(RD) = ((n + 0.5) tc(PHI)) – 5 ns (n = wait number)
twL(WR) = ((n + 0.5) tc(PHI)) – 5 ns (n = wait number)
For example, two software waits, PHI = 12 MHz operating
twL(RD) = 2.5 tc(PHI) – 5 ns = 203.33 ns
Table 15 Recommended operating conditions (Vcc = 3.0 to 3.6 V, Vss = 0 V, Ta = –20 to 70°C, unless otherwise noted)
Power source voltage
Analog reference voltage
Power source voltage
Analog reference voltage
DC-DC converter voltage
“H” input voltage
P00–P07, P10–P17, P20–P27,
P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“H” input voltage (Selecting VIHL level input) P20–P27
“H” input voltage
RESET, XIN, XCIN, CNVss
“H” input voltage
USB D+, USB D–
“L” input voltage
P00–P07, P10–P17, P20–P27,
P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“L” input voltage (Selecting VIHL level input)
P20–P27
“L” input voltage
RESET, XIN, XCIN, CNVss
“L” input voltage
USB D+, USB D–
“H” total peak output current
P00–P07, P10–P17, P20–P27,
(Note 1)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“L” total peak output current
P00–P07, P10–P17, P20–P27,
(Note 1)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“H” total average output current P00–P07, P10–P17, P20–P27,
(Note 1)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“L” total average output current P00–P07, P10–P17, P20–P27,
(Note 1)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“H” peak output current
P00–P07, P10–P17, P20–P27,
(Note 2)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“L” peak output current
P00–P07, P10–P17, P20–P27,
(Note 2)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“H” average output current
P00–P07, P10–P17, P20–P27,
(Note 3)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
“L” average output current
P00–P07, P10–P17, P20–P27,
(Note 3)P30–P37, P40–P44, P50–P57,
P60–P67, P70–P74, P80–P87
Main clock input frequency (Notes 4, 5)
Sub-clock input frequency (Notes 4, 6)
VCC
AVcc
VSS
AVSS
Ext. Cap.
VIH
VIL
ΣIOH(peak)
ΣIOL(peak)
ΣIOH(avg)
ΣIOL(avg)
IOH(peak)
IOL(peak)
IOH(avg)
IOL(avg)
f(XIN)
f(XCIN)
Limits
V
Parameter
Min.
3.0
0.8VCC
0.5VCC
0.8VCC
2.0
0
Typ.
3.3
0
3.3
Max.
3.6
VCC
Symbol
Unit
3.6
VCC
Recommended Operating Conditions
In Vcc = 3 V
0
1
VCC
0.2VCC
0.16VCC
0.2VCC
0.8
–80
80
–40
40
–10
10
–5.0
V
mA
32.768
5.0
24
50/5.0
MHz
kHz/MHz
Notes 1: The total peak output current is the peak value of the peak currents flowing through all the applicable ports. The total average output current is the average
value measured over 100 ms flowing through all the applicable ports.
2: The peak output current is the peak current flowing in each port.
3: The average output current is an average value measured over 100 ms.
4: The duty of oscillation frequency is 50
%.
5: Connect a ceramic resonator or a quartz-crystal oscillator between the XIN and XOUT pins. Its maximum oscillation frequency must be 24 MHz. However,
make sure to set
φ to 6 MHz or slower. More faster clocks are required as the f(XIN) when using the frequency synthesizer as possible.
6: Connect a ceramic resonator or a quartz-crystal oscillator between the XCIN and XCOUT pins. Its maximum oscillation frequency must be 50 kHz. Input an
external clock having 5 MHz (max.) frequency from the XCIN pin.
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