參數(shù)資料
型號(hào)： M37549G1FP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO24
封裝： 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù)： 51/86頁
文件大?。?/td> 1375K
代理商： M37549G1FP
Rev.2.02
Mar 31, 2009
Page 53 of 81
REJ03B0202-0202
7549 Group
Fig 68. State transition of oscillation stop detection circuit
Notes on switch of clock
(1) Executing the state transition after stabilizing XIN oscillation.
(2) MCU cannot be returned by on-chip oscillator and its operation is stopped since internal reset does not
occur at oscillation stop detected in state 2'a. Accordingly, do not execute the transition to state 2'a.
(3) STP instruction cannot be used when oscillation stop detection circuit is in active.
(4) The same applies when the high-speed on-chip oscillator is set as
φSOURCE. Make sure that the low-speed
on-chip oscillator should also oscillate. When a reset occurs, the high-speed on-chip oscillator stops.
Reset state 1
Oscillation stop detection reset disabled
When oscillation stop is detected;
CLKSTP2 is set to “1”.
Internal RESET does not occur.
= 02
= 12
CLKSTP0 = 02
(CLKSTP2 is set to “0”.)
CLKSTP 0 = 12
(Note 1)
Oscillation stop is detected
(internal reset)
Reset state 2
External reset (RESET=“L”)
Power-on reset
Low voltage detection reset
Watchdog timer reset
Reset by STP instruction function
Return from oscillation stop detection reset
CLKSTP2 is set to “1”.
So, return from oscillation stop reset can be
confirmed.
CLKSTP1= 02
CLKSTP1 = 02
(CLKSTP2 is
set to “0”.)
CLKM54 = 102
CLKM54 = 002
(Note 1)
Prohibitive state
MCU stops when oscillation stops
occurs.
State 3'a
State 2'b
State 3'b
State 3'c
Oscillation stop detection reset enabled
When oscillation stop is detected;
CLKSTP2 is set to “1”.
Internal RESET occurs.
Oscillation stop detection reset enabled
When oscillation stop is detected;
CLKSTP2 is set to “1”.
Internal RESET occurs.
Reset
released
CLKM54 = 102
CLKM54 = 002
(Note 1)
CLKM54=102
CLKM54=002
(Note 1)
State 3
XIN oscillation
: enabled
Low-speed on-chip oscillator : enabled
State 3'
XIN oscillation
: enabled
Low-speed on-chip oscillator : enabled
XIN
: enabled
High-speed on-chip oscillator : stop
Low-speed on-chip oscillator : enabled
CLKSTP1
CLKSTP1 = 12
State 2'
CLKSTP1= 12
XIN
: enabled
High-speed on-chip oscillator : stop
Low-speed on-chip oscillator : enabled
Reset
released
XIN oscillation
: enabled
Low-speed on-chip oscillator : enabled
XIN oscillation
: enabled
Low-speed on-chip oscillator : enabled
State 2
(Note 2)
φSOURCE: XIN
φSOURCE: Low-speed on-chip oscillator (Note 4)
Oscillation stop detection
circuit is in active. (Note 3)
State 2'a (Note 2)
Oscillation stop detection reset disabled
When oscillation stop is detected;
CLKSTP2 is set to "1".
Internal RESET does not occur.
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