參數(shù)資料
型號: M37549G1FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 17/86頁
文件大?。?/td> 1375K
代理商: M37549G1FP
Rev.2.02
Mar 31, 2009
Page 22 of 81
REJ03B0202-0202
7549 Group
Fig 19. Structure of Interrupt-related registers
b7
b0
INT0 interrupt edge selection bit
0: Falling edge active
1: Rising edge active
INT1 interrupt edge selection bit
0: Falling edge active
1: Rising edge active
Not used (returns “0” when read)
Interrupt edge selection register
(INTEDGE: address 003A16, initial value: 0016)
b7
b0
Interrupt request register 1
(IREQ1: address 003C16, initial value: 0016)
Serial I/O receive interrupt request bit
Serial I/O transmit interrupt request bit
INT0 interrupt request bit
INT1 interrupt request bit
Key-on wake up interrupt request bit
Capture interrupt request bit
Compare interrupt request bit
Timer A interrupt request bit
0: No interrupt request issued
1: Interrupt request issued
b7
b0
b7
b0
b7
b0
Interrupt request register 2
(IREQ2: address 003D16, initial value: 0016)
Timer 2 interrupt request bit
A/D conversion interrupt request bit
Timer 1 interrupt request bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
0: No interrupt request issued
1: Interrupt request issued
Interrupt control register 1
(ICON1: address 003E16, initial value: 0016)
Serial I/O receive interrupt enable bit
Serial I/O transmit interrupt enable bit
INT0 interrupt enable bit
INT1 interrupt enable bit
Key-on wake up interrupt enable bit
Capture interrupt enable bit
Compare interrupt enable bit
Timer A interrupt enable bit
0: Interrupts disabled
1: Interrupts enabled
Interrupt control register 2
(ICON2: address 003F16, initial value: 0016)
Timer 2 interrupt enable bit
A/D conversion interrupt enable bit
Timer 1 interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit)
0: Interrupts disabled
1: Interrupts enabled
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