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參數(shù)資料
| 型號(hào)： | M37542M4-XXXSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDIP32 |
| 封裝： | 0.400 INCH, PLASTIC, SDIP-32 |
| 文件頁數(shù)： | 8/68頁 |
| 文件大?。?/td> | 1191K |
| 代理商： | M37542M4-XXXSP |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7542 Group
MITSUBISHI MICROCOMPUTERS
16
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
I/O Ports
[Direction registers] PiD
The I/O ports have direction registers which determine the input/
output direction of each pin. Each bit in a direction register corre-
sponds to one pin, and each pin can be set to be input or output.
When “1” is set to the bit corresponding to a pin, this pin becomes
an output port. When “0” is set to the bit, the pin becomes an in-
put port.
When data is read from a pin set to output, not the value of the pin
itself but the value of port latch is read. Pins set to input are float-
ing, and permit reading pin values.
If a pin set to input is written to, only the port latch is written to and
the pin remains floating.
Note: P26/AN6, P27/AN7, P35 and P36 do not exist for the 32-pin version.
Accordingly, the following settings are required;
Select P33 for the INT1 function.
Set direction registers of ports P26 and P27 to output.
Set direction registers of ports P35 and P36 to output.
[Port P0P3 drive capacity control register] DCCR
By setting the Port P0P3 drive capacity control register (address
001516), the drive capacity of the N-channel output transistor for
the port P0 and port P3 can be selected.
[Pull-up control register] PULL
By setting the pull-up control register (address 001616), ports P0
and P3 can exert pull-up control by program. However, pins set to
output are disconnected from this control and cannot exert pull-up
control.
[Port P1P3 control register] P1P3C
By setting the port P1P3 control register (address 001716), a
CMOS input level or a TTL input level can be selected for ports
P10, P12, P13, P36, and P37 by program.
Fig. 17 Structure of port P1P3 control register
Fig. 16 Structure of pull-up control register
Port P1P3 control register
(P1P3C: address 0017 16, initial value: 00 16)
b7
b0
P37/INT0 input level selection bit
0 : CMOS level
1 : TTL level
P36/INT1 input level selection bit
0 : CMOS level
1 : TTL level
P10,P12,P13 input level selection bit
0 : CMOS level
1 : TTL level
Not used
Note: Keep setting the P3 6/INT1 input level selection bit
to “0” (initial value) for 32-pin version.
Pull-up control register
(PULL: address 001616, initial value: 0016)
P00 pull-up control bit
P01, P02 pull-up control bit
P03–P07 pull-up control bit
P30 pull-up control bit
P31, P32 pull-up control bit
P33 pull-up control bit
P34, P35 pull-up control bit
P36, P37 pull-up control bit
b7
b0
0 : Pull-up Off
1 : Pull-up On
Note : Pins set to output ports are disconnected from pull-up control.
Port P0P3 drive capacity control register
(DCCR: address 001516, initial value: 0016)
Port P00 drive capacity bit
Ports P01, P02 drive capacity bit
Ports P03–P07 drive capacity bit
Port P30 drive capacity bit
Ports P31, P32 drive capacity bit
Port P33 drive capacity bit
Ports P34, P35 drive capacity bit
Ports P36, P37 drive capacity bit
b7
b0
0 : Low
1 : High
Note: Number of LED drive port (drive capacity is HIGH) is 8-port.
Fig. 15 Structure of port P0P3 drive capacity control register
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