參數(shù)資料
型號(hào): M37512F8H-XXXHP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 61/87頁
文件大小: 879K
代理商: M37512F8H-XXXHP
Feb 18, 2005
page 64 of 85
REJ03B0122-0101
7512 Group
Fig. 72 CPU rewrite mode set/release flowchart
Figure 72 shows a flowchart for setting/releasing CPU rewrite
mode.
Notes 1: Set bits 6, 7 (main clock division ratio selection bits) at CPU mode register (003B16).
2: Before exiting the CPU rewrite mode after completing erase or program operation,
always be sure to execute the read array command.
End
Start
Execute read array command (Note 2)
Single-chip mode or Boot mode
Set CPU mode register (Note 1)
Using software command execute erase,
program, or other operation
Jump to control program transferred in RAM
(Subsequent operations are executed by control
program in this RAM)
Transfer CPU rewrite mode control program
to RAM
Write “0” to CPU rewrite mode select bit
Set CPU rewrite mode select bit to “1”
(by writing “0” and then “1” in succession)
Check CPU rewrite mode entry flag
E/W0 mode
Set All user block E/W enable bit “1”
(by writing “0” and then “1” in succession)
Set 8KB user block E/W enable bit
(writing “0” in case of E/W prohibit, writing “0” and
then “1” in succession, in case of E/W enable)
Set All user block E/W enable bit = “0”
Set 8KB user block E/W enable bit = “0”
End
Start
Execute read array command (Note 2)
Single-chip mode or Boot mode
Set CPU mode register (Note 1)
Using software command execute erase
program, or other operation
Set CPU rewrite mode select bit to “1”
(by writing “0” and then “1” in succession)
Write “0” to CPU rewrite mode select bit
Set E/W1 mode select bit = “1”
(by writing “0” and then “1” in succession)
Check CPU rewrite mode entry flag
E/W1 mode
Set All user block E/W enable bit = “0”
Set 8KB user block E/W enable bit = “0”
Set All user block E/W enable bit “1”
(by writing “0” and then “1” in succession)
Set 8KB user block E/W enable bit
(writing “0” in case of E/W prohibit, writing “0” and
then “1” in succession, in case of E/W enable)
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