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參數(shù)資料
| 型號： | M37512F8H-XXXHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 58/87頁 |
| 文件大?。?/td> | 879K |
| 代理商： | M37512F8H-XXXHP |
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Feb 18, 2005
page 61 of 85
REJ03B0122-0101
7512 Group
Table 14 The difference between EW0 mode and EW1 mode
Items
Processor mode
Program area for rewrite control program
Operating area for rewrite control program
Rewritable area
Restriction of software command
The mode after program or erase
CPU status at program and erase state
How to detect the flash memory status
The condition for shift to erase suspend
status (Note 2)
EW0 mode
Single-chip mode
User ROM area
Rewrite program in the flash memory area
must be transfered from another area than
flash memory area (ex. RAM area) and executed.
User ROM area
Nothing
Read status register mode
Executing
_____
Read the RY/BY status flag, program status
flag, erase status flag of the flash memory
control register 0 on program.
Read the SR7, SR5, SR4 of the status register
after execute the read status command
Write "1" to the erase suspend enable bit and
erase suspend requirement bit of the flash
memory control register on program.
EW1 mode
Single-chip mode
User ROM area
Rewrite program can be executed in the User
ROM area. (Note 3)
User ROM area except rewrite program existing
block and interrupt vector area (Note 1)
Program, Block erase command
Command execution for block existing rewrite
program is prohibited.
Read status register command execution is
prohibited
Read array mode
Hold state (I/O port is kept the execution previous
state.)
_____
Read the RY/BY status flag, program status
flag, erase status flag of the flash memory
control register 0 on program.
Write "1" to the erase suspend enable bit of
the flash memory control register 1 on pro-
gram and then interrupt request which is
enabled occurred.
Note 1
Write "1" to the 8KB userblock E/W prohibit bit of the flash memory control register 1, rewrite operation on block 0, block 1 is enabled.
Note 2 The enable time for reading flash memory after shifting to erase suspend status is max td(SR-ES).
Note 3 Do not execute rewrite program on RAM area. (Do not execute program on RAM area whether rewrite control program or application
program.)
qEW0 mode
Setting "1" to CPU rewrite mode selection bit of flash memory con-
trol register 0, CPU rewrite mode starts, and software command
becomes available. At this time, EW1 mode selection bit of the
flash memory control register 1 becomes "0" (EW0 mode). For
CPU rewrite mode select bit to be set to "1", it is necessary to
write "0" and then "1" in succession.
Program or erase operation is controlled by software command.
The state of program or erase end can be checked by reading the
flash memory control register or status register.
In case of changing to the erase suspend mode during the erase
operation, set the erase suspend enable bit to "1", and set the
erase suspend request bit "1". And wait td(SR-ES). The user ROM
area can be accessed after checking the erase suspend flag be-
comes "1". Setting the erase suspend request bit "0"(Erase
restart), erase operation restarts.
qEW1 mode
Setting the EW1 mode selection bit "1" (write "0" and then "1" in
succession) after setting the CPU rewrite mode selection bit "1"
(write "0" and then "1" in succession), the EW1 mode starts.
The state of the program or erase end can be checked by reading
the flash memory control register 0. Do not execute the software
command of the read status register in the EW1 mode.
Changing the erase suspend function to effective state, execute
the block erase command after setting erase suspend enable bit
"1". And the interrupt which triggers off shifting to erase suspend
state must be enabled. td(SR-ES) later after interrupt request,
erase sequence shift to erase suspend state, and interrupt is ac-
cepted.
When the interrupt request occurs, erase suspend request bit be-
comes "1" automatically, and erase operation is suspended. In
case of the erase operation is not completed (RY/BY status flag is
"0") after interrupt routine ends, setting the erase suspend request
bit "0", and execute the block erase command again.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37512F8-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37512FCHHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37512FCHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37512FCH-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37512FC-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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