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參數(shù)資料
| 型號(hào)： | M37274MA-XXXSP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PDIP52 |
| 封裝： | 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-52 |
| 文件頁(yè)數(shù)： | 7/131頁(yè) |
| 文件大?。?/td> | 2049K |
| 代理商： | M37274MA-XXXSP |
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104
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37274MA-XXXSP
PRELIMINARY
Notice:
This
is not
a final
specification.
Some
paramentic
limits
are
subject
to change.
Structure of Register
The figure of each register structure describes its functions, contents
at reset, and attributes as follows:
Note : The following registers are the mask version’s registers.
Values immediately after reset release
Bit attributes
(Note 1)
(Note 2)
Bits
2: Bit attributesThe attributes of control register bits are classified into 3 types : read-only, write-only
and read and write. In the figure, these attributes are represented as follows :
: Bit in which nothing is assigned
Notes 1: Values immediately after reset release
0“0” after reset release
1“1” after reset release
?Indeterminate after reset release
Read enabled
Read disabled
!
RRead
Write enabled
Write disabled
“0” can be set by software, but “1”
cannot be set.
WWrite
V
b7 b6 b5 b4 b3 b2 b1 b0
B
After reset RW
CPU Mode Register
0, 1
2
3, 4
0
1
Name
Functions
Processor mode bits
(CM0, CM1)
0 0: Single-chip mode
0 1:
1 0:
Not available
1 1:
Fix these bits to “1.”
0
Stack page selection
bit (Note) (CM2)
1
b1 b0
0: 0 page
1: 1 page
10
0
5
Nothing is assigned. This bit is write disable bit.
When this bit is read out, the value is “0.”
6, 7
0
Clock switch bits
(CM6, CM7)
0 0: f(XIN) = 8 MHz
0 1: f(XIN) = 12 MHz
1 0: f(XIN) = 16 MHz
1 1: Do not set
b7 b6
CPU mode register (CPUM) (CM) [Address FB 16]
RW
!
1
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| M37413E6HXXXFP | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| M37413M4-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| M37420M4-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP52 |
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