參數(shù)資料
型號(hào): M37273MFH-XXXSP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁(yè)數(shù): 6/130頁(yè)
文件大小: 1663K
代理商: M37273MFH-XXXSP
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5
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273MFH–XXXSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
Input/Output
ports
Serial I/O
Multi-master I
2
C-BUS interface
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
Clock generating circuit
Data slicer
ROM
RAM
OSD ROM
OSD RAM
P0
P1
0
–P1
7
P2
0
–P2
7
P3
0
, P3
1
P5
0
, P5
1
P5
2
–P5
7
, P6
I/O
I/O
I/O
I/O
Input
Output
71
0.5
μ
s (the minimum instruction execution time, at 8 MHz oscillation fre-
quency)
8 MHz (maximum)
60K bytes
1472 bytes (ROM correction memory included)
10K bytes
128 bytes
8-bit
1 (N-channel open-drain output structure, can be used as PWM
output pins, INT input pins, A-D input pin)
8-bit
1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P1
1
–P1
4
are used as multi-master I
2
C-BUS inter-
face, can be used as OSD output pin, A-D input pins, INT input pin, multi-
master I
2
C-BUS interface)
8-bit
1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P2
0
and 2
1
are used as serial output, can be
used as serial input/output pins, timer external clock input pins, OSD clock
input/output pin, sub-clock input/output pins)
2-bit
1 (CMOS input/output or N-channel open-drain output structure,
can be used as A-D input pins)
2-bit
1 (can be used as OSD input pins)
14-bit
1 (CMOS output structure, can be used as OSD output pins)
8-bit
1
1 (2 systems)
6 channels (6-bit resolution)
8-bit
6
8-bit timer
6
2 vectors
128 levels (maximum)
<17 types>
INT external interrupt
3, Internal timer interrupt
6, Serial I/O interrupt
1, OSD interrupt
1, Multi-master I
2
C-BUS interface interrupt
1, Data
slicer interrupt
1, f(X
IN
)/4096 interrupt
1, V
SYNC
interrupt
1, BRK
instruction interrupt
1, reset
1
2 built-in circuits (externally connected to a ceramic resonator or a quartz-
crystal oscillator)
Built-in
Parameter
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Functions
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