參數(shù)資料
型號: M37273MFH-XXXSP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 32/130頁
文件大小: 1663K
代理商: M37273MFH-XXXSP
31
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273MFH
XXXSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
8.6.2 I
2
C Address Register
The I
2
C address register (address 00F7
16
) consists of a 7-bit slave
address and a read/write bit. In the addressing mode, the slave ad-
dress written in this register is compared with the address data to be
received immediately after the START condition are detected.
(1) Bit 0: read/write bit (RBW)
Not used when comparing addresses, in the 7-bit addressing mode.
In the 10-bit addressing mode, the first address data to be received
is compared with the contents (SAD6 to SAD0 + RBW) of the I
2
C
address register.
The RBW bit is cleared to “0” automatically when the stop condition
is detected.
(2) Bits 1 to 7: slave address (SAD0
SAD6)
These bits store slave addresses. Regardless of the 7-bit address-
ing mode and the 10-bit addressing mode, the address data trans-
mitted from the master is compared with the contents of these bits.
Fig. 8.6.3 I
2
C Address Register
7 b
6 b
5 b4 b
3 b
2 b
1 b
0
0
Read/write bit
(RBW)
1
t
o
7
S
(
S
l
a
A
v
e
D
0
a
d
t
o
d
r
S
e
A
s
s
D
6
)
<Only in 10-bit addressing (in slave) mode>
The last significant bit of address data is
compared.
0: Wait the first byte of slave address after
START condition
(read state)
1: Wait the first byte of slave address after
RESTART condition
(write state)
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b
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I
2
C
A
d
d
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s
s
R
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I
2
C address register (S0D) [Address 00F7
16
]
B
Name
Functions
0
0
After reset
R W
R
R W
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