參數(shù)資料
型號: M37273MFH-XXXSP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 28/130頁
文件大?。?/td> 1663K
代理商: M37273MFH-XXXSP
27
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273MFH
XXXSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Internal clock : The serial I/O counter is set to “7” during the write
cycle into the serial I/O register (address 00EA
16
), and the transfer
clock goes HIGH forcibly. At each falling edge of the transfer clock
after the write cycle, serial data is output from the S
OUT
pin. Transfer
direction can be selected by bit 5 of the serial I/O mode register. At
each rising edge of the transfer clock, data is input from the S
IN
pin
and data in the serial I/O register is shifted 1 bit.
After the transfer clock has counted 8 times, the serial I/O counter
becomes “0” and the transfer clock stops at HIGH. At this time the
interrupt request bit is set to “1.”
Fig. 8.5.2 Serial I/O Timing (for LSB first)
S
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Transfer clock
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)
Serial I/O input
S
IN
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1
External clock : The an external clock is selected as the clock source,
the interrupt request is set to “1” after the transfer clock has been
counted 8 counts. However, transfer operation does not stop, so the
clock should be controlled externally. Use the external clock of 1 MHz
or less with a duty cycle of 50%.
The serial I/O timing is shown in Figure 8.5.2. When using an exter-
nal clock for transfer, the external clock must be held at HIGH for
initializing the serial I/O counter. When switching between an inter-
nal clock and an external clock, do not switch during transfer. Also,
be sure to initialize the serial I/O counter after switching.
Notes 1:
On programming, note that the serial I/O counter is set by writing to
the serial I/O register with the bit managing instructions, such as SEB
and CLB.
2:
When an external clock is used as the synchronous clock, write trans-
mit data to the serial I/O register when the transfer clock input level is
HIGH.
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