參數(shù)資料
型號: M37151M6-XXXFP
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 6/139頁
文件大?。?/td> 1491K
代理商: M37151M6-XXXFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP
5
Rev 1.0
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
Input/Output
ports
Serial I/O
Multi-master I
2
C-BUS interface
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
Clock generating circuit
Data slicer
ROM
RAM
P0
P1
0
–P1
6
P2
0
–P2
7
P3
0
, P3
1
P5
0
, P5
1
P5
2
–P5
5
M37151M6-XXXFP
M37151M8-XXXFP
M37151MA-XXXFP
M37151MC-XXXFP
M37151MF-XXXFP, M37151EFFP
M37151M6-XXXFP
M37151M8-XXXFP
M37151MA-XXXFP, M37151MC-XXXFP
M37151MF-XXXFP, M37151EFFP
71
0.5 ms (the minimum instruction execution time, at 8 MHz oscillation fre-
quency)
8 MHz (maximum)
24K bytes
32K bytes
40K bytes
48K bytes
60K bytes
1024 bytes (ROM correction memory included)
1152 bytes (ROM correction memory included)
1472 bytes (ROM correction memory included)
2048 bytes (ROM correction memory included)
8-bit
1 (N-channel open-drain output structure, can be used as PWM
output pins, INT input pins, A-D input pin)
7-bit
1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P1
1
–P1
4
are used as multi-master I
2
C-BUS inter-
face, can be used as A-D input pins, timer external clock input pins, multi-
master I
2
C-BUS interface)
8-bit
1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P2
0
and 2
1
are used as serial output, can be
used as serial input/output pins, timer external clock input pins, A-D input
pins, INT input pin, sub-clock input/output pins)
2-bit
1
(CMOS input/output structure, however, N-channel open-drain output structure,
when used as multi-master I
2
C-BUS interface, can be used as multi-master I
2
C-BUS interface.)
2-bit
1(can be used as OSD input pins)
4-bit
1(CMOS output structures, can be used as OSD output pins)
8-bit
1
One (Three lines)
8 channels (7-bit resolution)
8-bit
5
8-bit
6
2 vectors
128 levels (maximum)
<17 types>
INT external interrupt
3, Internal timer interrupt
6, Serial I/O interrupt
1, OSD interrupt
1, Multi-master I
2
C-BUS interface interrupt
1, Data
slicer interrupt
1, f(X
IN
)/4096 interrupt
1, V
SYNC
interrupt
1, BRK
instruction interrupt
1, reset
1
2 built-in circuits (externally connected to X
CIN/OUT
is a ceramic resonator
or a quartz-crystal oscillator)
Built-in
Parameter
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Functions
I/O
I/O
I/O
I/O
Input
Output
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