參數(shù)資料
型號: M34584EDFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 115/157頁
文件大?。?/td> 1130K
代理商: M34584EDFP
Rev.3.00
2004.08.06
page 60 of 155
REJ03B0010-0300Z
4584 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 48 State transition
Fig. 49 Set source and clear source of the P flag
Fig. 50 Start condition identified example using the SNZP in-
struction
A
Operation state
Operation source clock:
f(RING)
f(XIN): Stop
Key-on wakeup
POF instruction
execution
E
RAM back-up mode
D
Operation source clock:
f(XIN)
f(RING): Stop
POF instruction
execution
Operation state
Notes 1: Microcomputer starts its operation after counting f(RING) 120 to 144 times.
C
POF instruction
execution
Operation state
Operation source clock:
f(XIN)
f(RING): Operating
B
POF instruction
execution
Operation state
Operation source clock:
f(RING)
f(XIN): Operating
f(RING): stop
f(XIN): stop
MR1
←1
MR1
←0
(Note 5)
(Note 4)
MR0
←1
MR0
←0
RG0
←0
RG0
←1
Reset
(Note 1)
(Note 2)
(Note 3)
However, the selected contents (CMCK, CRCK, CYCK instruction execution state) of f(XIN) oscillation circuit is retained.
5: System returns to state A certainly when returning from the RAM back-up mode.
4: Continuous execution of the EPOF instruction and the POF instruction is required to go into the RAM back-up state.
3: Generate the wait time by software until the oscillation is stabilized, and then, switch the system clock.
MR1 cannot be cleared to “0” when the oscillation circuit is not selected.
Surely, select the f(XIN) oscillation circuit by executing the CMCK, CRCK or CYCK instruction before clearing MR1 to “0”.
The start/stop of oscillation and the operation source is switched by register MR.
instruction starts oscillatng (the start of oscillation and the operation source clock is not switched by these instructions).
2: The f(XIN) oscillation circuit (ceramic resonance, RC oscillation or quartz-crystal oscillation) selected by the CMCK, CRCK or CYCK
S
R
Q
Power down flag P
POF
instruction
Reset input
q Set source
q Clear source
Reset input
EPOF
instruction +
POF instruction
EPOF instruction +
Program start
P = “1”
?
Yes
Warm start
Cold start
No
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