參數(shù)資料
型號: M34556G8HFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42
封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù): 68/147頁
文件大小: 1087K
代理商: M34556G8HFP
Rev.3.02
Dec 22, 2006
page 25 of 142
REJ03B0025-0302
4556 Group
Table 7 External interrupt activated conditions
Name
External 0 interrupt
Input pin
D5/INT
Activated condition
When the next waveform is input to D5/INT pin
Falling waveform (“H”
→“L”)
Rising waveform (“L”
→“H”)
Both rising and falling waveforms
Valid waveform
selection bit
I11
I12
Fig. 17 External interrupt circuit structure
EXTERNAL INTERRUPTS
The 4556 Group has the external 0 interrupt.
An external interrupt request occurs when a valid waveform is input
to an interrupt input pin (edge detection).
The external interrupt can be controlled with the interrupt control
register I1.
Rising
0
1
Falling
I12
One-sided edge
detection circuit
Key-on wakeup
0
1
EXF0
External 0
interrupt
I11
D5/INT
K20
Timer 1 count start
synchronous circuit
I13
(Note 1)
Level detection circuit
Edge detection circuit
0
1
K21
Skip decision
(SNZI0 instruction)
Both edges
detection circuit
This symbol represents a parasitic diode on the port.
Notes 1:
(Note 2)
(Note 3)
2: I12 (I22) = 0: “L” level detected
I12 (I22) = 1: “H” level detected
3: I12 (I22) = 0: Falling edge detected
I12 (I22) = 1: Rising edge detected
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