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參數(shù)資料
| 型號： | M34556G8HFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| 封裝： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42 |
| 文件頁數(shù)： | 106/147頁 |
| 文件大?。?/td> | 1087K |
| 代理商： | M34556G8HFP |
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Rev.3.02
Dec 22, 2006
page 59 of 142
REJ03B0025-0302
4556 Group
(5) External clock
When the external clock signal is used as the main clock (f(XIN)),
connect the XIN pin to the clock source and leave XOUT pin open.
(Figure 52). Do not execute the CRCK instruction.
Be careful that the maximum value of the oscillation frequency
when using the external clock differs from the value when using the
ceramic resonator (refer to the recommended operating condition).
Also, note that the power down mode (POF and POF2 instructions)
cannot be used when using the external clock.
(6) Sub-clock generating circuit f(XCIN)
Sub-clock signal f(XCIN) is obtained by externally connecting a
quartz-crystal oscillator. Connect this external circuit and a quartz-
crystal oscillator to pins XCIN and XCOUT at the shortest distance. A
feedback resistor is built in between pins XCIN and XCOUT (Figure 53).
XCIN pin and XCOUT pin are also used as ports D6 and D7, respec-
tively. The sub-clock oscillation circuit is invalid and the function of
ports D6 and D7 are valid by setting bit 2 of register RG to “1”.
When sub-clock, ports D6 and D7 are not used, connect XCIN/D6 to
VSS and leave XCOUT/D7 open.
(7) Clock control register MR
Register MR controls system clock. Set the contents of this register
through register A with the TMRA instruction. In addition, the TAMR
instruction can be used to transfer the contents of register MR to
register A.
(8) Clock control register RG
Register RG controls the start/stop of each oscillation circuit. Set
the contents of this register through register A with the TRGA in-
struction.
Table 18 Clock control registers
Fig. 52 External clock input circuit
Fig. 53 External quartz-crystal circuit
ROM ORDERING METHOD
1.Mask ROM Order Confirmation Form*
2.Mark Specification Form*
3.Data to be written to ROM...one floppy disk.
* For the mask ROM confirmation and the mark specifications, re-
fer to the “Renesas Technology Corp.” Homepage
(http://www.renesas.com/homepage.jsp).
Note: Externally connect a damping
resistor Rd depending on the
oscillation frequency.
(A feedback resistor is built-in.)
Use the quartz-crystal manu-
facturer’s recommended value
because constants such as ca-
pacitance depend on the
resonator.
MR3
Clock control register MR
Operation mode
Through mode
Frequency divided by 2 mode
Frequency divided by 4 mode
Frequency divided by 8 mode
System clock
f(RING)
f(XIN)
f(XCIN)
Not available (Note 2)
at reset : 11002
at power down : state retained
MR3
0
1
MR1
0
1
R/W
TAMR/
TMRA
Operation mode selection bits
MR2
0
1
0
1
MR0
0
1
0
1
MR2
MR3
System clock selection bits (Note 3)
MR2
Sub-clock (f(XCIN)) oscillation available, ports D6 and D7 not selected
Sub-clock (f(XCIN)) oscillation stop, ports D6 and D7 selected
Main clock (f(XIN)) oscillation available
Main clock (f(XIN)) oscillation stop
On-chip oscillator (f(RING)) oscillation available
On-chip oscillator (f(RING)) oscillation stop
Sub-clock (f(XCIN)) control bit (Note 2)
Main-clock (f(XIN)) control bit (Note 2)
On-chip oscillator (f(RING)) control bit
(Note 2)
0
1
0
1
0
1
Clock control register RG
W
TRGA
at power down : state retained
at reset : 0002
RG2
RG1
RG0
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: “11” cannot be set to the low-order 2 bits (MR1, MR0) of register MR.
M34556
XIN
XOUT
External oscillation circuit
VDD
VSS
*
Do not use the CRCK instruction
in program.
M34556
XCIN
XCOUT
Rd
CIN
COUT
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