參數(shù)資料
型號: M34554EDFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù): 35/140頁
文件大?。?/td> 1079K
代理商: M34554EDFP
Rev.3.00
Aug 06, 2004
page 11 of 136
REJ03B0043-0300Z
4554 Group
Port block diagram (3)
Underflow signal divided by
2 of timer 1 or timer 2
W11
W10
Clock (input) for timer 1 event count
Register Y
Decoder
SD instruction
RD instruction
S
RQ
CLD
instruction
Skip decision
(SZD instruction))
(Note 1)
FR23
W60
0
1
D7/CNTR0
(Note 2)
S
RQ
D8/INT0
External 0 interrupt
circuit
External 0 interrupt
(Note 3)
Key-on wakeup
Timer 1 count start synchronous circuit input
S
RQ
D9/INT1
(Note 1)
(Note 2)
SD instruction
RD instruction
CLD
instruction
Register Y
Decoder
SD instruction
RD instruction
CLD
instruction
Register Y
Decoder
External 1 interrupt
circuit
External 1 interrupt
(Note 3)
Key-on wakeup
Timer 3 count start synchronous circuit input
(Note 1)
(Note 2)
This symbol represents a parasitic diode on the port.
2: Applied potential to these ports must be VDD or less.
3: As for details, refer to the description of external interrupt circuit.
Notes 1:
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