參數資料
型號： M34551E8-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, OTPROM, MICROCONTROLLER, PQFP48
封裝： 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數： 63/154頁
文件大?。?/td> 1778K
代理商： M34551E8-XXXFP
4551 Group User’s Manual
HARDWARE
1-5
PERFORMANCE OVERVIEW
Function
92
1.5
s (f(XIN) = 8.0 MHz:system clock = f(XIN)/4: VDD = 5.0 V)
4096 words ! 10 bits
8192 words ! 10 bits
280 words ! 4 bits (LCD RAM 20 words ! 4 bits included)
Eight independent output ports
4-bit I/O port; each pin is equipped with a pull-up function.
4-bit input port
1-bit output port (CMOS output)
8-bit timer with a reload register
14-bit timer/
Fixed dividing frequency timer
4-bit timer with a reload register
3 (one for external and two for timer)
1 level
8 levels (however, only 7 levels can be used when an interrupt is used or the TABP p instruction
is executed)
1/2, 1/3 bias
2, 3, 4 duty
4
20
200 k
! 3
CMOS silicon gate
48-pin plastic molded QFP
–20
°C to 70 °C
2.2 V to 5.5 V (One Time PROM version: 2.5 V to 5.5 V)
2.5 mA (f(XIN) = 8.0 MHz system clock = f(XIN)/4, VDD=5 V)
27.5
A (at main clock oscillation stop, sub-clock oscillation frequency: 32.0 kHz, Ta=25°C,
VDD=5 V)
0.1
A (at main clock oscillation stop, sub-clock oscillation stop, Ta=25 °C, VDD=5V)
Parameter
Number of basic instructions
Minimum instruction execution time
Memory sizes
Input/Output
ports
Timers
Interrupt
Subroutine nesting
LCD
Device structure
Package
Operating temperature range
Supply voltage
Power
dissipation
(typical value)
ROM
RAM
D0–D7
P00–P03
P10–P13
P20–P23
CARR
Timer 1
Timer 2/
Watchdog timer
Timer LC
Sources
Nesting
Selective bias value
Selective duty value
Common output
Segment output
Internal resistor for
power supply
at active
at clock operating
at RAM back-up
M34551M4
M34551M8
M34551E8
Output
I/O
Input
Output
DEFINITION OF CLOCK AND CYCLE
q System clock (STCK)
The system clock is the basic clock for controlling this product.
The system clock can be selected by bits 0 and 3 of the clock
control register MR as shown in the table below.
Table Selection of system clock
q Instruction clock (INSTK)
The instruction clock is the standard clock for controlling CPU.
The instruction clock is a signal derived from dividing the
system clock by 3. The one cycle of the instruction clock is
equivalent to the one machine cycle.
q Machine cycle
The machine cycle is the standard cycle required to execute
the instruction.
Note: f(XIN)/4 is selected immediately after system is released
from reset.
Register MR
MR3
0
1
MR0
0
1
0
1
System clock (STCK)
f(XIN)
f(XCIN)
f(XIN)/4
f(XCIN)/4
PERFORMANCE OVERVIEW
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相關代理商/技術參數
參數描述
M34551M4 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4-BIT SINGLE-CHIP MICROCOMPUTER
M34551M4-XXXFP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTER
M34551M8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4-BIT SINGLE-CHIP MICROCOMPUTER
M34552G8FP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
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