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參數(shù)資料
| 型號： | M34551E8-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, MICROCONTROLLER, PQFP48 |
| 封裝： | 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 140/154頁 |
| 文件大?。?/td> | 1778K |
| 代理商： | M34551E8-XXXFP |
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APPLICATION
2.2 Interrupts
2-9
4551 Group User’s Manual
2.2 Interrupts
The 4551 Group has three interrupt sources : external interrupt (INT), timer 1 interrupt and timer 2 interrupt.
This section describes individual types of interrupts, related registers, application examples using interrupts
and notes.
2.2.1 Interrupt functions
(1)
External interrupt (INT)
The interrupt request occurs by the change of input level of INT pin.
The interrupt valid waveform can be selected by the bit 2 of the interrupt control register I1.
s External interrupt processing
q When the interrupt is used
The interrupt occurrence is enabled when the bit 0 of the interrupt control register V1 and the
interrupt enable flag INTE are set to “1.” When the external interrupt occurs, the interrupt processing
is executed from address 0 in page 1.
q When the interrupt is not used
The interrupt is disabled and the SNZ0 instruction is valid when the bit 0 of register V1 is set
to “0.”
(2)
Timer 1 interrupt
The interrupt request occurs by the timer 1 underflow.
s Timer 1 interrupt processing
q When the interrupt is used
The interrupt occurrence is enabled when the bit 2 of the interrupt control register V1 and the
interrupt enable flag INTE are set to “1.” When the timer 1 interrupt occurs, the interrupt processing
is executed from address 4 in page 1.
q When the interrupt is not used
The interrupt is disabled and the SNZT1 instruction is valid when the bit 2 of register V1 is set
to “0.”
(3)
Timer 2 interrupt
The interrupt request occurs by the timer 2 underflow.
s Timer 2 interrupt processing
q When the interrupt is used
The interrupt occurrence is enabled when the bit 3 of the interrupt control register V1 and the
interrupt enable flag INTE are set to “1.” When the timer 2 interrupt occurs, the interrupt processing
is executed from address 6 in page 1.
q When the interrupt is not used
The interrupt is disabled and the SNZT2 instruction is valid when the bit 3 of register V1 is set
to “0.”
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34551M4 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4-BIT SINGLE-CHIP MICROCOMPUTER |
| M34551M4-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTER |
| M34551M8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:4-BIT SINGLE-CHIP MICROCOMPUTER |
| M34552G8FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34552G8HFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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