參數(shù)資料
型號(hào): M34501M4-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, MICROCONTROLLER, PDSO20
封裝: 5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20
文件頁數(shù): 25/116頁
文件大?。?/td> 859K
代理商: M34501M4-XXXFP
Rev.3.01
2005.02.07
page 16 of 112
REJ03B0104-0301
4501 Group
PROGRAM MEMOY (ROM)
The program memory is a mask ROM. 1 word of ROM is composed
of 10 bits. ROM is separated every 128 words by the unit of page
(addresses 0 to 127). Table 1 shows the ROM size and pages. Fig-
ure 10 shows the ROM map of M34501M4.
Table 1 ROM size and pages
Part number
M34501M2
M34501M4
M34501E4
ROM (PROM) size
( 10 bits)
2048 words
4096 words
Pages
16 (0 to 15)
32 (0 to 31)
A part of page 1 (addresses 008016 to 00FF16) is reserved for in-
terrupt addresses (Figure 11). When an interrupt occurs, the
address (interrupt address) corresponding to each interrupt is set
in the program counter, and the instruction at the interrupt address
is executed. When using an interrupt service routine, write the in-
struction generating the branch to that routine at an interrupt
address.
Page 2 (addresses 010016 to 017F16) is the special page for sub-
routine calls. Subroutines written in this page can be called from
any page with the 1-word instruction (BM). Subroutines extending
from page 2 to another page can also be called with the BM in-
struction when it starts on page 2.
ROM pattern (bits 7 to 0) of all addresses can be used as data ar-
eas with the TABP p instruction.
Fig. 10 ROM map of M34501M4/M34501E4
Fig. 11 Page 1 (addresses 008016 to 00FF16) structure
0
876
543
21
000016
008016
017F16
Subroutine special page
007F16
00FF16
010016
018016
Page 1
Page 2
Page 0
Page 3
Page 31
0FFF16
Interrupt address page
9
90
8
765
432
1
External 0 interrupt address
008016
008216
Timer 1 interrupt address
008416
Timer 2 interrupt address
008616
008816
008A16
00FF16
A/D interrupt address
008C16
008E16
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