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參數(shù)資料
| 型號(hào)： | M34501E4FP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 4.4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.300 INCH, PLASTIC, SOP-20 |
| 文件頁(yè)數(shù)： | 203/213頁(yè) |
| 文件大?。?/td> | 3014K |
| 代理商： | M34501E4FP |
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iv
4501 Group User’s Manual
List of figures
CHAPTER 1 HARDWARE
Pin configuration (top view) (4501 Group) ................................................................................. 1-3
Block diagram (4501 Group) ........................................................................................................ 1-4
Port block diagram (1) ................................................................................................................... 1-9
Port block diagram (2) ................................................................................................................. 1-10
Port block diagram (3) ................................................................................................................. 1-11
Port block diagram (4) ................................................................................................................. 1-12
External interrupt circuit structure .............................................................................................. 1-13
Fig. 1 AMC instruction execution example ............................................................................... 1-14
Fig. 2 RAR instruction execution example ............................................................................... 1-14
Fig. 3 Registers A, B and register E ........................................................................................ 1-14
Fig. 4 TABP p instruction execution example .......................................................................... 1-14
Fig. 5 Stack registers (SKs) structure ....................................................................................... 1-15
Fig. 6 Example of operation at subroutine call ....................................................................... 1-15
Fig. 7 Program counter (PC) structure ..................................................................................... 1-16
Fig. 8 Data pointer (DP) structure ............................................................................................. 1-16
Fig. 9 SD instruction execution example .................................................................................. 1-16
Fig. 10 ROM map of M34501M4/M34501E4 ............................................................................ 1-17
Fig. 11 Page 1 (addresses 008016 to 00FF16) structure ......................................................... 1-17
Fig. 12 RAM map ......................................................................................................................... 1-18
Fig. 13 Program example of interrupt processing ................................................................... 1-20
Fig. 14 Internal state when interrupt occurs ............................................................................ 1-20
Fig. 15 Interrupt system diagram ............................................................................................... 1-20
Fig. 16 Interrupt sequence .......................................................................................................... 1-22
Fig. 17 External interrupt circuit structure ................................................................................ 1-23
Fig. 18 External 0 interrupt program example-1 ...................................................................... 1-25
Fig. 19 External 0 interrupt program example-2 ...................................................................... 1-25
Fig. 20 External 0 interrupt program example-3 ...................................................................... 1-25
Fig. 21 Auto-reload function ....................................................................................................... 1-26
Fig. 22 Timers structure .............................................................................................................. 1-27
Fig. 23 Count timing diagram at CNTR input .......................................................................... 1-30
Fig. 24 Watchdog timer function ................................................................................................ 1-31
Fig. 25 Program example to start/stop watchdog timer ......................................................... 1-32
Fig. 26 Program example to enter the RAM back-up mode when using the watchdog timer .... 1-32
Fig. 27 A-D conversion circuit structure ................................................................................... 1-33
Fig. 28 A-D conversion timing chart .......................................................................................... 1-35
Fig. 29 Setting registers .............................................................................................................. 1-35
Fig. 30 Comparator operation timing chart ............................................................................... 1-36
Fig. 31 Definition of A-D conversion accuracy ........................................................................ 1-37
Fig. 32 Reset release timing ...................................................................................................... 1-38
Fig. 33 RESET pin input waveform and reset operation ....................................................... 1-38
Fig. 34 Power-on reset circuit example .................................................................................... 1-39
Fig. 35 Internal state at reset .................................................................................................... 1-40
Fig. 36 Voltage drop detection circuit ....................................................................................... 1-41
Fig. 37 Voltage drop detection circuit operation waveform example .................................... 1-41
Fig. 38 State transition ................................................................................................................ 1-44
Fig. 39 Set source and clear source of the P flag ................................................................. 1-44
Fig. 40 Start condition identified example using the SNZP instruction ................................ 1-44
List of figures
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M34501M2-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO20 |
| M34501E4FP | 4-BIT, OTPROM, MICROCONTROLLER, PDSO20 |
| M34501M4-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO20 |
| M34501E4FP | 4-BIT, OTPROM, MICROCONTROLLER, PDSO20 |
| M34502M2-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34501M2 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34501M2-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34501M4 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34501M4-XXXFP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34502E4 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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