deveopmen
Three-phase motor control timers
’
functions
Rev.B2 for proof reading
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
165
Sawtooth modulation
To generate a PWM waveform of sawtooth wave modulation, set
“
1
”
in the modulation mode select bit
(bit 6 at 0308
16
). Also, set
“
0
”
in the timers A4, A1, and A2-1 control bit (bit 1 at 0309
16
). In this mode, the
timer registers of timers A4, A1, and of A2 comprise conventional timers A4, A1, and A2 alone, and
reload the corresponding timer register
’
s content to the counter every time the timer B2 counter
’
s con-
tent becomes 0000
16
. The effective interrupt output specification bit (bit 1 at 0308
16
) and the effective
interrupt output polarity select bit (bit 0 at 0308
16
) go nullified.
An example of U phase waveform is shown in Figure 1.16.9, and the description of waveform output
workings is given below. Set
“
1
”
in DU0 (bit 0 at 030A
16
), and set
“
0
”
in DUB0 (bit 1 at 030A
16
). In
addition, set
“
0
”
in DU1 (bit 0 at 030B
16
) and set
“
1
”
in DUB1 (bit 1 at 030B
16
).
When the timber B2 counter
’
s content becomes 0000
16
, timer B2 generates an interrupt, and timer A4
starts outputting one-shot pulses at the same time. In this instance, the contents of the three-phase
buffer registers DU1 and DU0 are set in the three-phase output shift register (U phase), and the contents
of DUB1 and DUB0 are set in the three-phase output register (U phase). After this, the three-phase
buffer register
’
s content is set in the three-phase shift register every time the timer B2 counter
’
s content
becomes 0000
16
.
The value of DU0 and that of DUB0 are output to the U terminal (P8
0
) and to the U terminal (P8
1
)
respectively. When the timer A4 counter counts the value written to timer A4 (034F
16
, 034E
16
) and when
timer A4 finishes outputting one-shot pulses, the three-phase output shift register
’
s content is shifted
one position, and the value of DU1 and that of DUB1 are output to the U phase output signal and to the
U output signal respectively. At this time, one-shot pulses are output from the timer for setting dead time
used for setting the time over which the
“
L
”
level of the U phase waveform doesn
’
t lap over the
“
L
”
level
of the U phase waveform, which has the opposite phase of the former. The U phase waveform output
that started from the
“
H
”
level keeps its level until the timer for setting dead time finishes outputting one-
shot pulses even though the three-phase output shift register
’
s content changes from
“
1
”
to
“
0
”
by the
effect of the one-shot pulses. When the timer for setting dead time finishes outputting one-shot pulses,
0 already shifted in the three-phase shift register goes effective, and the U phase waveform changes to
the
“
L
”
level. When the timer B2 counter
’
s content becomes 0000
16
, the contents of the three-phase
buffer registers DU1 and DU0 are set in the three-phase shift register (U phase), and the contents of
DUB1 and DUB0 are set in the three-phase shift register (U phase) again.
A U phase waveform is generated by these workings repeatedly. With the exception that the three-
phase output shift register on the U phase side is used, the workings in generating a U phase waveform,
which has the opposite phase of the U phase waveform, are the same as in generating a U phase
waveform. In this way, a waveform can be picked up from the applicable terminal in a manner in which
the
“
L
”
level of the U phase waveform doesn
’
t lap over that of the U phase waveform, which has the
opposite phase of the U phase waveform. The width of the
“
L
”
level can also be adjusted by varying the
values of timer B2 and timer A4. In dealing with the V and W phases, and V and W phases, the latter are
___