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參數(shù)資料
| 型號： | M32172F2VFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 27/40頁 |
| 文件大?。?/td> | 3556K |
| 代理商： | M32172F2VFP |
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1
1-13
Rev.1.0
Overview
1.3 Pin Functions
Table 1.3.1 Description of Pin Functions (2/6)
Classification Pin Name
Description
Type
Function
Data bus
DB0-DB15
Data bus
Input/Output 16-bit data bus for connecting external devices. In write
___ ___
cycle, the CPU outputs BHW/BHE and BLW/BLE
indicating the valid byte position to write on the 16-bit
data bus. In read cycle, the CPU always reads data
from the full 16-bit data bus. However, data at only the
valid byte position is transferred to the internal circuit
of the M32R.
Bus control
___ ___
CS0, CS1
Chip select
Output
Chip select signal for external devices. For details about
___ ___
CS2, CS3
areas for which the chip select signal is output, refer to
Chapter 3, "Address Space."
__
RD
Read
Output
This signal is output when reading an external device.
___ ___
BHW/BHE
Byte high
Output
Indicates the byte position to which valid data will be
write/enable
___
transferred when writing to an external device.BHW/
___ ___
BLW/BLE
Byte low
Output
___
BHE is output for the upper address side (D0-D7 is
write/enable
___ ___
valid), while BLW/BLE is output for the lower address
side (D8-D15 is valid).
____
WAIT
Wait
Input
____
If input on WAIT is low when the M32R accesses an
external device, the wait cycle is extended.
____
HREQ
Hold request Input
This input pin is provided for external devices to request
____
control of the external bus. If input on the HREQ pin is
pulled low, the M32R goes to a hold state.
____
HACK
Hold
Output
This signal is used to indicate that the M32R has entered
acknowledge
a hold state and relinquished control of the external bus.
Input/
TIN8-TIN11,
Timer input
Input
Input/output timer input pin.
output timer
TIN16-TIN23
TO0-TO15
Timer output Output
Input/output timer output pin.
Interrupt
___
SBI
System breakInput
System Break Interrupt (SBI) input pin for the interrupt
controller
interrupt
controller.
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