參數(shù)資料
型號: M30LW128D
廠商: 意法半導體
英文描述: 128 Mbit (two 64Mbit, x8/x16, Uniform Block, Flash Memories) 3V Supply, Multiple Memory Product
中文描述: 128兆位(兩個64兆比特,x8/x16,統(tǒng)一座,快閃記憶體)3V電源,多記憶體產(chǎn)品
文件頁數(shù): 26/57頁
文件大小: 860K
代理商: M30LW128D
M30LW128D
26/57
I
If only the Program Status bit (bit 4) is set High,
V
OH
,
then the Program/Erase Controller has
applied the maximum number of pulses to the
byte and still failed to verify that the Write Buffer
has programmed correctly or that the Block is
protected.
I
If the failure is due to a program or block protect
with V
PEN
low, V
OL
, then V
PEN
Status bit (bit 3)
is also set High, V
OH
.
I
If the failure is due to a program on a protected
block then Block Protection Status bit (bit 1) is
also set High, V
OH
.
I
If the failure is due to a program or erase
incorrect command sequence then Erase
Status bit (bit 5) is also set High, V
OH
.
Once set High, the Program Status bit can only be
reset Low by a Clear Status Register command or
a hardware reset. If set High it should be reset be-
fore a new Program or Erase command is issued,
otherwise the new command will appear to fail.
V
PEN
Status (Bit 3).
The V
PEN
Status bit can be
used to identify if a Program, Erase, Block Protec-
tion or Block Unprotection operation has been at-
tempted when V
PEN
is Low, V
IL
.
When the V
PEN
Status bit is Low, V
OL
, no Pro-
gram, Erase, Block Protection or Block Unprotec-
tion operations have been attempted with V
PEN
Low, V
IL
, since the last Clear Status Register com-
mand, or hardware reset. When the V
PEN
Status
bit is High, V
OH
, a Program, Erase, Block Protec-
tion or Block Unprotection operation has been at-
tempted with V
PEN
Low, V
IL
.
Once set High, the V
PEN
Status bit can only be re-
set by a Clear Status Register command or a hard-
ware reset. If set High it should be reset before a
new Program, Erase, Block Protection or Block
Unprotection command is issued, otherwise the
new command will appear to fail.
Program Suspend Status (Bit 2).
The Program
Suspend Status bit indicates that a Program oper-
ation has been suspended and is waiting to be re-
sumed. The Program Suspend Status should only
be considered valid when the Program/Erase
Controller Status bit is High (Program/Erase Con-
troller inactive); after a Program/Erase Suspend
command is issued the device may still complete
the operation rather than entering the Suspend
mode.
When the Program Suspend Status bit is Low,
V
OL
, the Program/Erase Controller is active or has
completed its operation; when the bit is High, V
OH
,
a Program/Erase Suspend command has been is-
sued and the device is waiting for a Program/
Erase Resume command.
When a Program/Erase Resume command is is-
sued the Program Suspend Status bit returns Low.
Block Protection Status (Bit 1).
The Block Pro-
tection Status bit can be used to identify if a Pro-
gram or Erase operation has tried to modify the
contents of a protected block.
When the Block Protection Status bit is Low, V
OL
,
no Program or Erase operations have been at-
tempted to protected blocks since the last Clear
Status Register command or hardware reset;
when the Block Protection Status bit is High, V
OH
,
a Program (Program Status bit 4 set High) or
Erase (Erase Status bit 5 set High) operation has
been attempted on a protected block.
Once set High, the Block Protection Status bit can
only be reset Low by a Clear Status Register com-
mand or a hardware reset. If set High it should be
reset before a new Program or Erase command is
issued, otherwise the new command will appear to
fail.
Reserved (Bit 0).
Bit 0 of the Status Register is
reserved. Its value should be masked.
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