- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67760 > M30825MW-XXXGP 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP144 PDF資料下載
參數(shù)資料
| 型號： | M30825MW-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 24/48頁 |
| 文件大小： | 847K |
| 代理商： | M30825MW-XXXGP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
TABLE 1. Input Channel Samples Produced at Data Outputs in 1:2 Demultiplexed Mode**
Data Outputs
(Always sourced with
respect to fall of DCLK+)
Non DES Sampling Mode
Dual-Edge Sampling Mode (DES)
I- Channel Selected
Q- Channel Selected *
DI
I- Channel Input Sampled with
Fall of CLK 13 cycles earlier.
I- Channel Input Sampled
with Fall of CLK 13 cycles
earlier.
Q- Channel Input Sampled with
Fall of CLK 13 cycles earlier.
DId
I- Channel Input Sampled with
Fall of CLK 14 cycles earlier.
I- Channel Input Sampled
with Fall of CLK 14 cycles
earlier.
Q- Channel Input Sampled with
Fall of CLK 14 cycles earlier.
DQ
Q- Channel Input Sampled with
Fall of CLK 13 cycles earlier.
I- Channel Input Sampled
with Rise of CLK 13.5 cycles
earlier.
Q- Channel Input Sampled with
Rise of CLK 13.5 cycles earlier.
DQd
Q- Channel Input Sampled with
Fall of CLK 14 cycles earlier.
I- Channel Input Sampled
with Rise of CLK 14.5 cycles
earlier.
Q- Channel Input Sampled with
Rise of CLK 14.5 cycles earlier.
* Note that, in DES + Non-DES Mode, only the I- Channel is sampled. In DES + Extended Control Mode, I- Channel or Q-
Channel can be sampled.
** Note that, in the Non-Demultiplexed Mode, the DId and DQd outputs are disabled and are high impedance.
TABLE 2. Input Channel Samples Produced at Data Outputs in 1:1 Demultiplexed Mode
Data Outputs
(Sourced with respect to fall of DCLK+)
Non-DES Mode
DES Mode
DI
I- Channel Input Sampled with Fall of CLK
13 cycles earlier.
I- Channel Input Sampled with Fall of CLK
13 cycles earlier.
Dld
No output.
DQ
Q- Channel Input Sampled with Fall of
CLK 13 cycles earlier.
Q- Channel Input Sampled with Fall of
CLK 13.5 cycles earlier.
DQd
No output.
1.1.5.2 OutEdge and Demultiplex Control Setting
To help ease data capture in the SDR Mode, the output data
may be caused to transition on either the positive or the neg-
ative edge of the output data clock (DCLK). In the Non-
Extended Control Mode, this is chosen with the OutEdge input
(pin 4). A high on the OutEdge input pin causes the output
data to transition on the rising edge of DCLK+, while ground-
ing this input causes the output to transition on the falling edge
of DCLK. See 2.5.3 Output Edge Synchronization. When in
the Extended Control Mode, the OutEdge is selected using
the OED bit in the Configuration Register. This bit has two
functions. In the single data rate (SDR) Mode, the bit functions
as OutEdge and selects the DCLK edge with which the data
transitions. In the Double Data Rate (DDR) Mode, this bit se-
lects whether the device is in Non-Demultiplex or 1:2 Demul-
tiplex Mode. In the DDR case, the DCLK has a 0° phase
relationship with the output data independent of the demulti-
plexer selection.
For 1:2 Demux DDR 0 deg Mode, there are five, as opposed
to four cycles of CLK delay from the deassertion of
DCLK_RST to the Synchronizing Edge. See 1.5 MULTIPLE
1.1.5.3 Double Data Rate
A choice of single data rate (SDR) or double data rate (DDR)
output is offered. With single data rate the output clock
(DCLK) frequency is the same as the data rate of the two out-
put buses. With double data rate the DCLK frequency is half
the data rate and data is sent to the outputs on both edges of
DCLK. DDR clocking is enabled in Non-Extended Control
Mode by tying pin 4 to V
A/2.
1.1.5.4 Clocking Summary
The chip may be in one of four modes, depending on the Dual-
Edge Sampling (DES) selection and the demultiplex selec-
tion. For the DES selection, there are two possibilities: Non-
DES Mode and DES Mode. In Non-DES Mode, each of the
channels (I-channel and Q-channel) functions independently,
i.e. the chip is a dual 1.5 GSPS A/D converter. In DES Mode,
the I- and Q-channels are interleaved and function together
as one 3.0 GSPS A/D converter. For the demultiplex selec-
tion, there are also two possibilities: Demux Mode and Non-
Demux Mode. The I-channel has two 8-bit output busses
associated with it: DI and DId. The Q-channel also has two 8-
bit output busses associated with it: DQ and DQd. In Demux
Mode, the channel is demultiplexed by 1:2. In Non-Demux
Mode, the channel is not demultiplexed. Note that Non-De-
mux Mode is also sometimes referred to as 1:1 Demux Mode.
For example, if the I-channel was in Non-Demux Mode, the
corresponding digital output data would be available on only
the DI bus. If the I-channel was in Demux Mode, the corre-
sponding digital output data would be available on both the
DI and DId busses, but at half the rate of Non-Demux Mode.
Given that there are two DES Mode selections (DES Mode
and Non-DES Mode) and two demultiplex selections (Demux
Mode and Non-Demux Mode), this yields a total of four pos-
www.national.com
30
ADC08D1520QML
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M30823MH-XXXGP | 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP100 |
| M30826MH-XXXFP | 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP100 |
| M30826MH-XXXGP | 32-BIT, MROM, 30 MHz, MICROCONTROLLER, PQFP100 |
| M32000D4BFP-80 | 32-BIT, 80 MHz, MICROCONTROLLER, PQFP100 |
| M32171F4VFP | 32-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP144 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M30826MH-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER |
| M30826MH-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER |
| M30828MH-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16/32-BIT CMOS MICROCOMPUTER |
| M30830T-EPB | 功能描述:M-SUPPORT TOOL RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁面:1429 (CN2011-ZH PDF) |
| M30830T-RPD-E | 功能描述:EMULATOR PERSONALITY KIT M16C/80 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 配件 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 標(biāo)準(zhǔn)包裝:1 系列:- 附件類型:USB 至 1-Wire? RJ11 適配器 適用于相關(guān)產(chǎn)品:1-Wire? 設(shè)備 產(chǎn)品目錄頁面:1429 (CN2011-ZH PDF) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。