參數(shù)資料
型號(hào)： M30620FCPFP
廠商： Renesas Technology Corp.
英文描述： SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述： 單片16位CMOS微機(jī)
文件頁(yè)數(shù)： 60/87頁(yè)
文件大?。?/td> 901K
代理商： M30620FCPFP
V
CC1
= V
CC2
= 3V
M16C/62 Group (M16C/62P, M16C/62PT)
5. Electrical Characteristics (M16C/62P)
4
8
f
3
0
0
2
,
0
.
o
N
0
1
e
R
page 60
Switching Characteristics
(V
CC1
= V
CC2
= 3V, V
SS
= 0V, at Topr =
–
20 to 85
o
C /
–
40 to 85
o
C, unless otherwise specified)
Table 5.48 Memory expansion and Microprocessor Modes
(for 2- to 3-wait setting, external area access and multiplex bus selection)
Symbol
Standard
Min.
Measuring condition
Max.
50
Parameter
Unit
t
d(BCLK-AD)
t
h(BCLK-AD)
t
h(RD-AD)
t
h(WR-AD)
Address output delay time
Address output hold time (refers to BCLK)
Address output hold time (refers to RD)
Address output hold time (refers to WR)
ns
ns
ns
ns
4
t
d(BCLK-CS)
t
h(BCLK-CS)
t
h(RD-CS)
t
h(WR-CS)
Chip select output delay time
Chip select output hold time (refers to BCLK)
Chip select output hold time (refers to RD)
Chip select output hold time (refers to WR)
50
ns
ns
ns
ns
4
(Note 1)
(Note 1)
t
d(BCLK-RD)
t
h(BCLK-RD)
t
d(BCLK-WR)
t
h(BCLK-WR)
RD signal output delay time
RD signal output hold time
WR signal output delay time
WR signal output hold time
40
ns
ns
ns
ns
0
40
t
d(BCLK-DB)
t
h(BCLK-DB)
t
d(DB-WR)
t
h(WR-DB)
t
d(BCLK-HLDA)
Data output delay time (refers to BCLK)
Data output hold time (refers to BCLK)
Data output delay time (refers to WR)
Data output hold time (refers to WR)
HLDA output delay time
50
ns
ns
ns
ns
ns
4
(Note 2)
(Note 1)
0
(Note 1)
1. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 10
9
–
10
[ns]
2. Calculated according to the BCLK frequency as follows:
f(BCLK)
(n
–
0.5) X 10
9
–
50
[ns]
3. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 10
9
–
40
[ns]
n is
“
2
”
for 2-wait setting,
“
3
”
for 3-wait setting.
(Note 1)
t
d(BCLK-ALE)
t
h(BCLK-ALE)
t
d(AD-ALE)
ALE signal output delay time (refers to BCLK)
ALE signal output hold time (refers to BCLK)
ALE signal output delay time (refers to Address)
25
ns
ns
ns
–
4
t
h(ALE-AD)
t
d(AD-RD)
t
d(AD-WR)
t
dZ(RD-AD)
ALE signal output hold time (refers to Adderss)
RD signal output delay from the end of Address
WR signal output delay from the end of Address
Address output floating start time
ns
ns
ns
ns
0
0
8
(Note 3)
(Note 4)
4. Calculated according to the BCLK frequency as follows:
f(BCLK)
0.5 X 10
9
–
15
[ns]
NOTES:
40
See
Figure 5.11
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M30620FCPFP D3 制造商:Renesas Electronics Corporation 功能描述:
M30620FCPFP D5 制造商:Renesas Electronics Corporation 功能描述:
M30620FCPFP#D3 制造商:Renesas Electronics Corporation 功能描述:MCU 16-bit M16C CISC 128KB Flash 3.3V/5V 100-Pin PQFP 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT R8C CISC 128KB FLASH 3.3V/5V 100PQFP - Trays
M30620FCPFP#D3C 功能描述:IC M16C MCU FLASH 128K 100LQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/62P 產(chǎn)品培訓(xùn)模塊:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 標(biāo)準(zhǔn)包裝:1 系列:M16C™ M32C/80/87 核心處理器:M32C/80 芯體尺寸:16/32-位 速度:32MHz 連通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外圍設(shè)備:DMA，POR，PWM，WDT 輸入/輸出數(shù):121 程序存儲(chǔ)器容量:384KB（384K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:24K x 8 電壓 - 電源 (Vcc/Vdd):3 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 34x10b，D/A 2x8b 振蕩器型:內(nèi)部 工作溫度:-20°C ~ 85°C 封裝/外殼:144-LQFP 包裝:托盤(pán) 產(chǎn)品目錄頁(yè)面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87
M30620FCPFP#D5 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT M16C CISC 128KB FLASH 3.3V/5V 100PQFP - Trays
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