
Universal Serial Bus
75
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
except for the last packet, if the data set in the buffer is not a multiple of the MAXP, the USB FCU sends
a short packet.
The USB FCU updates the buffer status flags from 112 to 002 after the data set has been successfully
transmitted to the host.
Double Buffer Mode:
The CPU writes a “1” to the SET_IN_BUF_RDY bit of the corresponding EPx IN CSR after the CPU
finishes writing a data set up to its buffer size to the buffer (updates the IN_BUF_STS1 & IN_BUF_STS0
flags). The USB FCU sends out data packets equal to the MAXP size one at a time, except for the last
packet if the data in the buffer is not a multiple of the MAXP, the USB FCU sends a short packet.
If the buffer is immediately available to accept another data set, the buffer status flags transition from
002 to 012.
If the buffer is not available to accept another data set, the buffer status flags transition from 012 to 112.
The USB FCU updates the buffers status flags after a data set has been successfully transmitted to the
host.
If the buffer has one more data set in it, the buffer status flags transition from 112 to 012.
If the buffer has no more data set in it, the buffer status flags transition from 012 to 002.
AUTO_SET is enabled and continuous transfer mode disabled:
Single Buffer Mode:
After the CPU writes a data packet equal to the MAXP size to the buffer, the USB FCU updates the
corresponding EPx IN CSR’s IN_BUF_STS1 & IN_BUF_STS0 flags from 002 to 112 automatically without
the CPU writing ”1” to the SET_IN_BUF_RDY bit. The USB FCU updates the buffer status flags from 112
to 002 after the data packet has been successfully transmitted to the host.
If the data packet is less than the MAXP size, the CPU must write "1" to the SET_IN_BUF_RDY bit to
signify the data packet is ready to send.
Double Buffer Mode:
After the CPU writes a data packet equal to its MAXP size to the buffer, the USB FCU updates the
corresponding EPx IN CSR’s IN_BUF_STS1 & IN_BUF_STS0 flags.
If the buffer is immediately available to accept another data packet, the buffer status flags transition
from 002 to 012.
If the buffer is not available to accept another data packet, the buffer status flags transition from 012 to
112.
The USB FCU updates the buffers status flags after a data packet has been successfully transmitted to
the host.
If the buffer has one more data packet in it, the buffer status flags transition from 112 to 012.
If the buffer has no more data packet in it, the buffer status flags transition from 012 to 002.
If the data packet is less than the MAXP size, the CPU must write “1” to the SET_IN_BUF_RDY bit to
signify the data packet is ready to send.
AUTO_SET and continuous transfer mode are enabled:
Single Buffer Mode:
After the CPU writes a data set equal to the buffer size to the buffer, the USB FCU updates the corre-
sponding EPx IN CSR’s IN_BUF_STS1 & IN_BUF_STS0 flags from 002 to 112 automatically without the
CPU writing ”1” to the SET_IN_BUF_RDY bit.