
Universal Serial Bus
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
74
CASE 1: The host sends three 8-byte packets and one 2-byte packet. When the core receives the last 2-
byte packet, the OUT_BUF_RDY flag is set (because of a short packet) indicating the CPU can unload
the data. At the end of unloading, the CPU should clear the OUT_BUF_RDY flag and set the
DATA_END. If the host sends more data after this point, the core returns STALL automatically.
CASE 2: The host sends 6 8-byte packets (anything greater than 3 for this example) and one 2-byte
packet (host may erroneously send 50 bytes instead of 26). The host ACKs each received packet
however, it does not automatically return a STALL because the DATA_END flag is not set when the
excessive packets are received. When the CPU retrieves the data and detects that the data field is
greater than the wLength, it sets the SEND_STALL bit for the core to return STALL.
EP1-4 IN (Transmit) FIFO Operation
The CPU writes data to the endpoint’s FIFO Data Register. The write pointer automatically increments by 2
in word accessing mode or increments by 1 in byte accessing mode after a write. The CPU must only write
data to the FIFO Data Register when the IN_BUF_STS1 flag of the corresponding EPx IN CSR is “0”. The
IN_BUF_STS0 & IN_BUF_STS1 flags are both “1” after a hardware reset or a USB reset, and become “0”
when the corresponding endpoint is first enabled (Endpoints 1-4 IN & OUT are disabled at reset).
The user can program the buffer size and starting location of each IN Endpoint. Users can assign a buffer
size up to 1024 bytes in units of 64 bytes to an endpoint. If double buffer mode is selected, the effective
buffer size is 2 x buffer size specified.
Continuous transfer mode is available for IN EP1-4 for Bulk Transfers only. When the continuous transfer
mode is enabled, it is the user’s responsibility to ensure the buffer size is a multiple of the MAXP value.
AUTO_SET function is available for IN EP1-4 for both noncontinuous and continuous modes. When this
function is enabled, if a short packet or a less than buffer size data set is to be transmitted to the host, the
CPU must write a “1” to the SET_IN_BUF_RDY bit to signify the packet (data set) is ready to send.
AUTO_SET and continuous transfer mode are disabled:
Single Buffer Mode:
The CPU writes a “1” to the SET_IN_BUF_RDY bit of the corresponding EPx IN CSR after the CPU
finishes writing a data packet to the buffer (updates the IN_BUF_STS1 & IN_BUF_STS0 flags from 002
to 112). The USB FCU updates the buffer status flags from 112 to 002 after the data packet has been
successfully transmitted to the host.
Double Buffer Mode:
The CPU writes “1” to the SET_IN_BUF_RDY bit of the corresponding EPx IN CSR after the CPU
finishes writing a data packet to the buffer (updates the IN_BUF_STS1 & IN_BUF_STS0 flags).
If the buffer is immediately available to accept another data packet, the buffer status flags transition
from 002 to 012.
If the buffer is not available to accept another data packet, the buffer status flags transition from 012 to
112.
The USB FCU updates the buffers status flags after a data packet has been successfully transmitted to
the host.
If the buffer has one more data packet in it, the buffer status flags transition from 112 to 012.
If the buffer has no more data packet in it, the buffer status flags transition from 012 to 002.
AUTO_SET is disabled and continuous transfer mode enabled:
Single Buffer Mode:
The CPU writes a “1” to the SET_IN_BUF_RDY bit of the corresponding EPx IN CSR after the CPU
finishes writing a data set up to its buffer size to the buffer (updates the IN_BUF_STS1 & IN_BUF_STS0
flags from 002 to 112). The USB FCU sends out data packets equal to the MAXP size one at a time,