參數(shù)資料
型號(hào)： M30240M6-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80
封裝： 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 95/139頁
文件大小： 1453K
代理商： M30240M6-XXXFP
59
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
Universal Serial Bus
1.2.18.4.17 USB Endpoint x OUT MAXP Register
The USB Endpoint x OUT MAXP Register, shown in Figure 1.50, indicates the maximum packet size (MAXP)
of an Endpoint x OUT packet. The default values for endpoints 1-4 are 0 bytes. The setting of this register also
affects the configuration of single/dual packet operation. When MAXP > 1/2 of the FIFO size, single packet is
set. When MAXP <= 1/2 of the FIFO size, dual packet mode is set.
Figure 1.50: USB Endpoint x OUT MAXP
1.2.18.4.18 USB Endpoint x OUT Write Count Register
The USB Endpoint x OUT Write Count (WRT CNT) Register, shown in Figure 1.51, contains the number of
bytes of the current data set in the OUT FIFO. The USB FCU sets the value in the Write Count Register after
having successfully received a packet of data from the host. The CPU reads the register to determine the number
of bytes to be read from the FIFO.
Figure 1.51: USB Endpoint x OUT WRT CNT
1.2.18.4.19 USB Endpoint x FIFO Register
The USB Endpoint x FIFO Register, shown in Figure 1.52 is the USB IN (transmit) and OUT (receive) FIFO
data register. The CPU writes data to this register for the corresponding Endpoint IN FIFO and reads data from
this register for the corresponding Endpoint OUT FIFO.
Figure 1.52: USB Endpoint x FIFO Register
USB Endpoint x OUT MAXP Register
Symbol
Address
When reset
EPiOMP (i = 1-4)
031C16, 032416, 032C16, 033416
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
OMAXP0
to
OMAXP7
Function
W
R
Maximum packet size
(MAXP) of Endpoint x
OUT packet.
For endpoints that support smaller
FIFO size, unused bits are not
implemented, (always write "0" to
these bits).
USB Endpoint x OUT Write Count Register
Symbol
Address
When reset
EPiWC (i = 1-4)
031D16, 032516, 032D16, 033516
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
W_CNT0
to
W_CNT7
Function
W
R
Receive Byte Count
X
USB Endpoint x FIFO Register
Symbol
Address
When reset
EPi (i = 0-4)
033816, 033916, 033A16, 033B16, 033C16
Indeterminate
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
DATA_0
to
DATA_7
Function
W
R
Endpoint x IN/OUT FIFO
O
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