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| 型號(hào)： | M30240M6-XXXFP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁(yè)數(shù)： | 70/139頁(yè) |
| 文件大?。?/td> | 1453K |
| 代理商： | M30240M6-XXXFP |
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36
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
Address Match Interrupt
1.2.15 Address Match Interrupt
An address match interrupt is generated when the address match interrupt address register contents
match the program counter value. Two address match interrupts can be set, each of which can be
enabled and disabled by an address match interrupt enable bit. Address match interrupts are not
affected by the interrupt enable flag (I flag) and processor interrupt priority level (IPL).
Figure 1.20 shows the address match interrupt-related registers.
Figure 1.20: Address match interrupt-related registers
1.2.16 Watchdog Timer
The watchdog timer has the function of detecting when the program is out of control. The watchdog timer
is a 15-bit counter that decrements using the clock derived by dividing the internal clock
Φ using the
prescaler. A watchdog timer interrupt is generated when an underflow occurs in the watchdog timer. Bit
7 of the watchdog timer control register (address 000F16) selects the prescaler division ratio (by 16 or
128). Table 1.13 shows the periodic table for the watchdog timer.
Table 1.13:
Watchdog timer periodic table (f(XIN)=12MHz)
Note: The watchdog timer’s period is subject to some error due to the prescaler.
CM06
CM17
CM16
Internal clock
Φ
WDC7
Period (Note)
00
0
12MHz
0
Approx. 43.7ms
1
Approx. 349.5ms
00
1
6MHz
0
Approx. 87.4ms
1
Approx. 699.1ms
01
0
3MHz
0
Approx. 174.8ms
1
Approx. 1.40s
0
1
0.75MHz
0
Approx. 699.1ms
1
Approx. 5.59s
1
Invalid
1.5MHz
0
Approx. 349.5ms
1
Approx. 2.80s
Bit name
Bit symbol
Symbol
Address
When reset
AIER
000916
XXXXXX002
Address match interrupt enable register
Function
W
R
Address match interrupt 0
enable bit
0 : Interrupt disabled
1 : Interrupt enabled
AIER0
Address match interrupt 1
enable bit
AIER1
Symbol
Address
When reset
RMAD0
001216 to 001016
X0000016
RMAD1
001616 to 001416
X0000016
Nothing is assigned.
b7
b6
b5
b4
b3
b2
b1
b0
W
R
Address setting register for address match interrupt
Function
Values that can be set
Address match interrupt register i (i = 0, 1)
0000016 to FFFFF16
Nothing is assigned.
0 : Interrupt disabled
1 : Interrupt enabled
b0 b7
b0
b3
(b19)
(b16)
b7
b0
(b15)
(b8)
b7
(b23)
Write 0 when writing to these bits. If read, the value is indeterminate.
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| M30240M7 | 制造商:MITSUBISHI 制造商全稱(chēng):Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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