參數(shù)資料
型號: M30240M6-XXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80
封裝: 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 56/139頁
文件大?。?/td> 1453K
代理商: M30240M6-XXXFP
23
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
Clock-Generating Circuit
Figure 1.12: Clock-generating circuit
1.2.6.2 Clocks generated by the clock-generating circuit.
Main clock
The main clock is generated by the main clock oscillation circuit. After a reset, the clock is divided by
8 to the internal clock
Φ.
After the oscillation of the main clock oscillation circuit has stabilized, the drive capacity of the XOUT
pin can be reduced using the XIN - XOUT) drive capacity select bit (bit 5 at address 000716). Reducing
the drive capacity of the XOUT pin reduces the power dissipation. This bit defaults to “1” when shifting
to stop mode and after a reset.
Internal clock
Φ
The internal clock
Φ is the clock that drives the CPU, and is either the main clock or is derived by di-
viding the main clock by 2, 4, 8, or 16. The internal clock
Φ is derived by dividing the main clock by 8
after a reset.
When shifting to stop mode, the main clock division select bit (bit 6 at 000616) is set to “1”.
Peripheral Function clock
f1, f8, f32
The clock for the peripheral devices is derived from the main clock or by dividing it by 8 or 32. The
peripheral function clock is stopped by stopping the main clock or by setting the WAIT peripheral func-
tion clock stop bit (bit 2 at 000616) to “1” and then executing a WAIT instruction.
CM0i :
Bit i at address 000616
CM1i :
Bit i at address 000716
FSCCRi: Bit i at address 03DB16
WAIT instruction
CM02
Q
S
R
NMI
Interrupt request
level judgment
output
RESET
Software reset
fAD
Divider
a
d
1/2
CM06=0
CM17,CM16=00
CM06=0
CM17,CM16=01
CM06=0
CM17,CM16=10
CM06=1
CM06=0
CM17,CM16=11
d
a
Details of divider
c
b
1/2
c
f1
f32SIO2
f8SIO2
f1SIO2
f8
f32
φ
XOUT
Main clock
CM10 “1”
Write signal
Q
S
R
XIN
Frequency
Synthesizer
Circuit
fusb (48MHz)
FSCCR0=1
FSCCR0=0
BCLK
fsyn
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