參數(shù)資料
型號： M30240M6-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80
封裝： 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 75/139頁
文件大?。?/td> 1453K
代理商： M30240M6-XXXFP
40
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
Frequency Synthesizer Circuit
The FSC0 bit in the FSC Control Register enables the frequency synthesizer block. When disabled
(FSC0 = “0”), fVCO is held at either a high or low state. When the frequency synthesizer control bit is
active (FSC0 = “1”), a lock status (LS = “1”) indicates that fSYN and fVCO are the correct frequency. The
LS and FSCO control bits in the FSC Control register are shown in Figure 1.27.
When using the frequency synthesizer, a low-pass filter must be connected to the LPF pin.
Once the frequency synthesizer is enabled, a delay of 2-5ms is recommended before the output of the
frequency synthesizer is used. This is done to allow the output to stabilize. It is also recommended that
none of the registers be modified once the frequency synthesizer is enabled as it will cause the output
to be temporarily (2-5ms) unstable. The MCU clock source is selected via the Frequency Synthesizer
Clock Control register (FSCCR). See Figure 1.28.
Note: None of the registers must be written to once the frequency synthesizer is enabled and used as
the system clock source (FSCCR register, address 03DB16, bit “0” set to “1”) because it will cause the
output of the PLL to freeze. Switch system back to f(XIN) and disable before modifying PLL registers.
Figure 1.27: Frequency Synthesizer Control Register (FSC)
Figure 1.28: Frequency Synthesizer Clock Control Register (FSCCR)
Frequency Synthesizer Control Register
Symbol
Address
When reset
FSC
03DC16
6016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
0 : Disable
1 : Enabled
VCO0
FSE
VCO Gain Control
Function
Bit 2
Bit 1
0
0:
Lowest Gain (Note)
0
1:
Low Gain
1
0:
High Gain
1
1:
Highest Gain
Frequency Synthesizer Enable
W
R
Reserved bit
Must always be set to "0"
VCO1
CHG0
CHG1
LPF Current Control
Bit 6
Bit 5
0
0:
Disabled
0
1:
Low Current
1
0:
Intermediate Current (Note)
1
1:
High Current
LS
Frequency Synthesizer
Lock Status
0:
Unlocked
1:
Locked
Note :
Recommended
0 0
Frequency Synthesizer Clock Control Register
Symbol
Address
When reset
FSCCR
03DB16
0016
Bit name
Bit symbol
b7
b6
b5
b4
b3
b2
b1
b0
0 : XIN
1 : fsyn
FSCCR0
Function
W
R
Reserved
Must always be set to "0"
Clock source selection
0 0 0
0 0 0 0
相關PDF資料
PDF描述
M30240M6-XXXFP 16-BIT, MROM, 12 MHz, MICROCONTROLLER, PQFP80
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