參數(shù)資料
型號: M30240ECFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, OTPROM, 12 MHz, MICROCONTROLLER, PQFP80
封裝: 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù): 44/231頁
文件大小: 3508K
代理商: M30240ECFP
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119
Mitsubishi microcomputers
M30240 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Specifications REV. G
Specifications in this manual are tentative and subject to change
Precautions
The value of the stack pointer is initialized to 0000016 immediately after reset. Accepting an interrupt
before setting a value in the stack pointer may cause program runaway. Be sure to set a value in the
stack pointer before accepting an interrupt.
When using the NMI interrupt, initialize the stack pointer at the beginning of a program. Concerning
the first instruction immediately after reset, generating any interrupts including the NMI interrupt is
prohibited.
Setting interrupts
Changing the Interrupt Priority Level select bit (ILVL) and clearing the Interrupt Request bit (IR) in
the Interrupt Control Registers (ICR) while the Interrupt enable flag (I-FLAG) is “1”, may result in un-
intended operations, such as BRK and other interrupts being generated. Disable the interrupts by
clearing the I-FLAG before setting ILVL or clearing the IR bit.
To prevent the I-FLAG from being set before the ICR is rewritten due to the effects of the instruction
queue, instructions that equal a minimum of 2 cycles should be inserted between writing to the ICR
and setting the I-FLAG (2-NOPs, I MOV, I POP, etc.)
Modifying interrupt control registers
Do not modify any interrupt control register when an interrupt request can be generated.
If an interrupt request occurs, modify the interrupt control register after the interrupt is disabled.
External interrupts
When the polarity of the INT0 and INT1 pins is changed, the interrupt request bit can be set to “1”.
After changing the polarity, the interrupt request bit should be cleared to “0.”
The NMI interrupt
As for the NMI interrupt pin, an interrupt cannot be prohibited. Connect it to the Vcc pin if unused.
Do not get into stop mode or wait mode with the NMI pin set to “L”.
1.3.1.7 Noise
To reduce the possibility of noise problems:
Connect a bypass capacitor (approximately 0.1
F) across the Vss pin and the Vcc pin with the shortest
possible wiring
Use circuit traces with a larger diameter than other signal traces for Vss and Vcc.
Vpp connection of One-time PROM version
The Vpp (power input for PROM programming) connection for the internal PROM is connected to the CN-
Vss pin on the One-time PROM version. Therefore, CNVss should be a short circuit trace to improve noise
resistance. If the CNVss trace is long, insert a 5k
resistor close to the CNVss pin and connect it to Vss.
Note: Inserting a 5k
resistor will not cause any problem when switching to a mask ROM version.
1.3.1.8 Software reset
Software reset with fSYN is selected as a clock source. If the Frequency Synthesizer related registers
are written to while fSYN is selected as the clock source, the MCU will runaway. To avoid this:
1. Select f(XIN) as the clock source before the software reset
2. Perform software reset
3. Confirm software reset using Frequency Synthesizer Enable bit
4. Reselect fSYN as clock source.
1.3.1.9 Stop Mode and Wait Mode
When returning from stop mode by hardware reset, RESET pin must be set to “L” level until main clock
oscillation is stabilized.
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