參數(shù)資料
型號： M30101M3-XXXFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PDSO42
封裝： PLASTIC, SSOP-42
文件頁數(shù)： 107/125頁
文件大?。?/td> 1608K
代理商： M30101M3-XXXFP
Serial I/O
Under
development
Tentative Specifications REV.C1
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30101/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
82
Clock synchronous serial I/O mode
Symbol
Address
When reset
UiMR (i=0,1)
00A016, 00A816
0016
CKDIR
UARTi transmit/receive mode registers
Internal/external clock
select bit
STPS
PRY
PRYE
SLEP
0 : Internal clock
1 : External clock (Note)
Bit name
Function
Bit symbol
W
R
b7 b6 b5 b4 b3 b2 b1 b0
0 (Must always be “0” in clock synchronous serial I/O mode)
01
0
SMD0
SMD1
SMD2
Serial I/O mode select bit
0 0 1 : Clock synchronous serial
I/O mode
b2 b1 b0
0
Invalid in clock synchronous serial I/O mode
Note : Set the corresponding port direction register to “0”.
(When transfer clock output from multiple pins is not selected)
Pin name
Function
Method of selection
TxDi
(P14, P37)
Serial data output
Serial data input
Transfer clock output
Transfer clock input
(Outputs dummy data when performing reception only)
RxDi
(P15, P35, P37)
CLKi
(P16, P36)
Internal/external clock select bit (bit 3 at address 00A016 and 00A816) = “0”
Internal/external clock select bit (bit 3 at address 00A016 and 00A816) = “1”
Port P16 and P36 direction register (bit 6 at address 00E316 and 00E716) = “0”
Port P15, P35 and P37 direction register (bit 5 at address 00E116, bit 5
and 7 at address 00E716)= “0”
(Can be used as an I/O port when performing transmission only)
Table 1.15.2. Input/output pin functions in clock synchronous serial I/O mode
Table 1.15.2 lists the functions of the input/output pins during clock synchronous serial I/O mode. This
table shows the pin functions when the transfer clock output from multiple pins is not selected. Note that
for a period from when the UARTi operation mode is selected to when transfer starts, the TxDi pin outputs
an “H”. (If the N-channel open-drain is selected, this pin is in floating state.)
Figure 1.15.6. UARTi transmit/receive mode register in clock synchronous serial I/O mode
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