參數(shù)資料
型號(hào): M2V56S20TP-6
廠商: Mitsubishi Electric Corporation
英文描述: 128 x 64 pixel format, LED Backlight available
中文描述: 256M同步DRAM
文件頁(yè)數(shù): 14/49頁(yè)
文件大?。?/td> 244K
代理商: M2V56S20TP-6
Feb.2000
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.1)
Single Data Rate
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
14
A2
A1
A0
Initial Address BL
Sequential
Interleaved
Column Addressing
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
-
0
0
-
0
1
-
1
0
-
1
1
-
-
0
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
0
1
0
3
2
5
4
7
6
2
3
4
5
6
7
0
1
2
3
0
1
6
7
4
5
3
4
5
6
7
0
1
2
3
2
1
0
7
6
5
4
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
5
6
7
0
1
2
3
4
5
4
7
6
1
0
3
2
6
7
0
1
2
3
4
5
6
7
4
5
2
3
0
1
7
0
1
2
0
1
2
3
1
2
3
0
2
3
0
1
3
0
0
1
7
6
5
4
0
1
2
3
1
0
3
2
2
3
0
1
3
2
0
1
-
-
1
1
2
1
0
3
4
5
6
3
2
1
0
1
0
1
0
8
4
2
Command
Address
CLK
Read
Y
Write
Y
/CAS Latency
Burst Length
Burst Length
DQ
Burst Type
CL= 3
BL= 4
Q0
Q1
Q2
Q3
D0
D1
D2
D3
相關(guān)PDF資料
PDF描述
M2V56S30TP-6 128 x 64 pixel format, LED Backlight available
M2V56S40TP-6 128 x 64 pixel format, LED Backlight available
M2V56S30ATP-7 256M Synchronous DRAM
M2V56S30TP 256M Synchronous DRAM
M2V56S30TP-8 256M Synchronous DRAM
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