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參數(shù)資料
| 型號(hào)： | M2V28D30ATP-10 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 353620600 |
| 中文描述： | 128M的雙數(shù)據(jù)速率同步DRAM |
| 文件頁數(shù)： | 25/36頁 |
| 文件大?。?/td> | 1216K |
| 代理商： | M2V28D30ATP-10 |
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25
MITSUBISHI ELECTRIC
Jun,'00
Preliminary
MITSUBISHI LSIs
DDR SDRAM (Rev.0.1)
M2S28D20/ 30/ 40ATP
128M Double Data Rate Synchronous DRAM
After tRCD from the bank activation, a WRITE command can be issued. 1st input data is set from
the WRITE command with data strobe input, following (BL-1) data are written into RAM, when
the Burst Length is BL. The start address is specified by A11,A9-A0(x4)/A9-A0(x8)/A8-A0(x16),
and the address sequence of burst data is defined by the Burst Type. A WRITE command may be
applied to any active bank, so the row precharge time (tRP) can be hidden behind continuous input
data by interleaving the multiple banks. From the last data to the PRE command, the write recovery
time (tWRP) is required. When A10 is high at a WRITE command, the auto-precharge(WRITEA) is
performed. Any command(READ,WRITE,PRE,ACT) to the same bank is inhibited till the internal
precharge is complete. The next ACT command can be issued after tDAL from the last input data
cycle.
WRITE
Multi Bank Interleaving WRITE (BL=8)
Command
A0-9,11
A10
BA0,1
DQ
ACT
00
WRITE
00
WRITE
0
0
10
ACT
Xb
10
0
10
tRCD
D
tRCD
D
PRE
Xa
0
00
PRE
DQS
WRITE with Auto-Precharge (BL=8)
Command
A0-9,11
A10
BA0,1
DQ
ACT
Xa
00
WRITE
1
00
ACT
Xb
00
tRC
D
Da0
DQS
/CLK
CLK
/CLK
CLK
Da1
Da2
Da3
Da4
Da5
Da6
Da7
Da0
Da1
Da2
Da3
Da4
Da5
Da6
Da7
Db0
Db1
Db2
Db3
tDAL
Db4
Db5
Db6
Db7
Xa
Y
Xb
Xa
Ya
Yb
Xb
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| M2V28D30ATP-75 | 128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-10 | 128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-75 | 128M Double Data Rate Synchronous DRAM |
| M2S28D20ATP | 128M Double Data Rate Synchronous DRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M2V28D30ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28D40ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Double Data Rate Synchronous DRAM |
| M2V28S20ATP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM |
| M2V28S20ATP-6 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:128M Synchronous DRAM |
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