參數(shù)資料
型號: M2S56D30AKT-75
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 32M X 8 DDR DRAM, 0.75 ns, PDSO64
封裝: 0.40 MM PITCH, STSOP-64
文件頁數(shù): 30/41頁
文件大小: 638K
代理商: M2S56D30AKT-75
36
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
Burst write operation can be interrupted by precharge of the same or all bank. Random column access is
allowed. tWR is referenced from the first positive CLK edge after the last data input.
[Write interrupted by Precharge]
Write Interrupted by Precharge (BL=8, CL=2.5)
Command
A0-9,11
A10
BA0,1
DQ
WRITE
Yi
0
00
PRE
00
Dai0 Dai1
QS
DM
tWR
/CLK
CLK
相關(guān)PDF資料
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M2V56S30ATP-6 32M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2S56D30AKT-75A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30AKT-75AL 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30AKT-75L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2S56D30ATP 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
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