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參數(shù)資料
| 型號： | M2S56D30AKT-75 |
| 廠商： | ELPIDA MEMORY INC |
| 元件分類： | DRAM |
| 英文描述： | 32M X 8 DDR DRAM, 0.75 ns, PDSO64 |
| 封裝： | 0.40 MM PITCH, STSOP-64 |
| 文件頁數(shù)： | 3/41頁 |
| 文件大?。?/td> | 638K |
| 代理商： | M2S56D30AKT-75 |
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11
DDR SDRAM
E0338M10 (Ver.1.0)
(Previous Rev.1.54E)
Jan. '03 CP(K)
M2S56D20/ 30/ 40ATP
256M Double Data Rate Synchronous DRAM
M2S56D20/ 30/ 40AKT
FUNCTION TRUTH TABLE (3/4)
Current State /CS /RAS /CAS /WE Address
Command
Action
Notes
H
X
X X
DESEL
NOP (Idle after tRP)
L
H
H X
NOP
NOP (Idle after tRP)
L
H
L BA
TERM
ILLEGAL
2
L
H
L
X BA, CA, A10
READ / WRITE
ILLEGAL
2
L
H
H BA, RA
ACT
ILLEGAL
2
L
H
L BA, A10
PRE / PREA
NOP (Idle after tRP)
4
L
H X
REFA
ILLEGAL
LL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
H
X
X X
DESEL
NOP (Row Active after tRCD)
L
H
H X
NOP
NOP (Row Active after tRCD)
L
H
L BA
TERM
ILLEGAL
2
L
H
L
X BA, CA, A10
READ / WRITE
ILLEGAL
2
L
H
H BA, RA
ACT
ILLEGAL
2
L
H
L BA, A10
PRE / PREA
ILLEGAL
2
L
H X
REFA
ILLEGAL
LL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
H
X
X X
DESEL
NOP
LH
H
H X
NOP
L
H
L BA
TERM
ILLEGAL
2
L
H
L
X BA, CA, A10
READ / WRITE
ILLEGAL
2
L
H
H BA, RA
ACT
ILLEGAL
2
L
H
L BA, A10
PRE / PREA
ILLEGAL
2
L
H X
REFA
ILLEGAL
LL
L
Op-Code,
Mode-Add
MRS
ILLEGAL
ROW
ACTIVATING
WRITE RE-
COVERING
PRE-
CHARGING
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PDF描述 |
|---|---|
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M2S56D30AKT-75A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D30AKT-75AL | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D30AKT-75L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D30ATP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2S56D30ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
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