參數(shù)資料
型號： M29F100-T70M3TR
廠商： 意法半導體
元件分類： FLASH
英文描述： 1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory
中文描述： 1兆位的128KBx8或64Kbx16，有啟動區(qū)域的單電源閃存
文件頁數(shù)： 9/30頁
文件大小： 207K
代理商： M29F100-T70M3TR
AI01980B
E
G
W
A0-A15/
A–1
DQ0-DQ7/
DQ8-DQ15
VALID
VCC
tVCHEL
tWHEH
tWHWL
tELWL
tAVWL
tWHGL
tWLAX
tWHDX
tAVAV
tDVWH
tWLWH
tGHWL
RB
tWHRL
Figure 7. Write AC Waveforms, W Controlled
Note: Address are latched on the falling edge of W, Data is latched on the rising edge of W.
a block not being erased returns valid data. During
suspension the memory will respond only to the
Erase Resume ER and the Program PG instruc-
tions. A Program operation can be initiated during
erase suspend in one of the blocks not being
erased. It will result in both DQ2 and DQ6 toggling
when the data is beingprogrammed. ARead/Reset
command will definitively abort erasure and result
in invalid data in the blocks being erased.
Erase Resume (ER) Instruction. If an Erase Sus-
pend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at any address, and without any
Coded cycles.
POWER SUPPLY
Power Up
The memory Command Interface is reset on power
up to Read Array. Either E or W must be tied to VIH
during Power Up to allow maximum security and
the possibility to write a command on the first rising
edge of E and W. Any write cycle initiation is
blocked when Vcc is below VLKO.
Supply Rails
Normal precautions must be taken for supply volt-
age decoupling; each device in a system should
have the VCC rail decoupledwith a 0.1
F capacitor
close to the VCC and VSS pins. The PCB trace
widths should be sufficient to carry the VCC pro-
gram and erase currents required.
17/30
M29F100T, M29F100B
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