參數資料
型號: LXT1000
英文描述: LAN TRANSCEIVER|SINGLE|HYBRID|BGA|492PIN|PLASTIC
中文描述: 網絡收發(fā)器|單|混合|的BGA | 492PIN |塑料
文件頁數: 14/104頁
文件大?。?/td> 1500K
代理商: LXT1000
LXT1000
Gigabit Ethernet Transceiver
14
Datasheet
B11
C10
B9
E10
C8
E8
D7
E6
RXD7
RXD6
RXD5
RXD4
RXD3
RXD2
RXD1
RXD0
O
Receive Data Bus
. The width of this synchronous output bus varies with speed/mode:
1000: All 8 bits are driven.
100 and 10 MII mode: RXD<3:0> are driven; RXD<7:4> are held Low.
10 Serial: RXD<0> is driven; RXD<7:1> are held Low.
C12
RX_DV
O
Receive Data Valid.
This synchronous output is asserted when valid data is driven on
RXD.
E13
RX_ER
O
Receive Error
. For 1000 operation, this output is asserted when error symbols or
carrier-extension symbols are received. For 100 operation, it is asserted when error
symbols are received. For 10 operation, it is not asserted. It is always synchronous to
RX_CLK.
B15
RX_CLK
O
Receive Clock
. This output clock is used to synchronize the receive output signals. Its
frequency depends upon the link speed:
1000: 125 MHz
100: 25 MHz (35/65 duty cycle)
10 MII or Auto-negotiation: 2.5 MHz
10 Serial: 10 MHz
E15
COL
O
Collision.
This asynchronous output is asserted when a collision is detected (applies
to half-duplex links only). In full-duplex mode, this output is forced Low.
E16
CRS
O
Carrier Sense.
This asynchronous output is asserted when data is detected at the
twisted-pair interface.
MAC Data Interface - TBI Configuration
3
- 1000-Only Operation
C20, E20,
D21, G22,
F23, H23,
J22, J24,
E18, C18
TXD<9:0>
I
Transmit Data Bus
. This input bus must be synchronized to GTX_CLK.
D17
TX_CLK
O
Transmit Clock
. 25 MHz output. Not used; provided as a utility.
B17
GTX_CLK
I
Gigabit Transmit Clock
. 125 MHz input clock
B11, C10,
B9, E10,
C8, E8, D7,
E6, C12,
E13
RXD<9:0>
O
Receive Data Bus
. This output data bus is synchronized to RBC0/RBC1.
B15, E15
RBC0, RBC1
O
Receive Clocks
. Two 62.5 MHz output clocks are provided at these outputs. RBC0 is
180 degrees (8 ns = 1/2 period delay) with respect to RBC1.
E16
COMDET
O
Comma Detect
. Toggles when comma sequence is detected in the receive data
stream.
Table 2. LXT1000 GMII Signal Descriptions
(Continued)
Ball #
Symbol
Type
1
Description
1. I/O Column Coding: I = Input, O = Output
2. Complies with IEEE 802.3, Clauses 35.(GMII) and 22 (MII); Modes 1000 (GMII), 100 (MII), 10 (MII or Serial), Auto-
negotiation.
3. Complies with IEEE 802.3, Clause 36. NOTE: This section is an alternate listing of previously described pins.
相關PDF資料
PDF描述
LXT19908 Amplifier. Other
LXT300JE PCM Transceiver
LXT300NE PCM Transceiver
LXT300PE PCM Transceiver
LXT300ZNE PCM TRANSCEIVER|SINGLE|CEPT PCM-30/E-1|CMOS|DIP|28PIN|PLASTIC
相關代理商/技術參數
參數描述
LXT10000 制造商:Red Lion Controls 功能描述:ANNUNCIATOR LABELS, 1 LPAX LABEL: T 制造商:Red Lion Controls 功能描述:1 LPAX LABEL T
LXT1001BC 制造商:Level One 功能描述:ELECTRONIC COMPONENT
LXT13002D WAF 制造商:Intel 功能描述:
LXT14003D 制造商:Intel 功能描述:
LXT14003D DIE 制造商:Intel 功能描述: