參數(shù)資料
型號(hào): LXT1000
英文描述: LAN TRANSCEIVER|SINGLE|HYBRID|BGA|492PIN|PLASTIC
中文描述: 網(wǎng)絡(luò)收發(fā)器|單|混合|的BGA | 492PIN |塑料
文件頁數(shù): 13/104頁
文件大?。?/td> 1500K
代理商: LXT1000
Gigabit Ethernet Transceiver
LXT1000
Datasheet
13
Table 1. Signal Type Abbreviations
Symbol
Signal Type
Definition
I
Input
Standard input-only signal.
LHR
Input
Latched, L-H Reset
Latched on Low-to-High edge of RESET; ignored thereafter.
MD
Input,
Latched, MDDIS
Latched on Low-to-High edge of RESET; used thereafter only if Manual Control mode
(MDDIS) = 1.
O
Output
Standard output-only signal.
I/O
Bidirectional
Input and output signal.
A
Analog
Current source signal.
PD
Pull Down
Pull down signal. Tie Low.
PU
Pull Up
Pull up signal.
N/C
No Connect
Do not connect.
Table 2. LXT1000 GMII Signal Descriptions
Ball #
Symbol
Type
1
Description
MAC Data Interface
2
- 1000/100/10 Operation
C20
E20
D21
G22
F23
H23
J22
J24
TXD7
TXD6
TXD5
TXD4
TXD3
TXD2
TXD1
TXD0
I
Transmit Data Bus
. The width of this synchronous input bus varies with the speed/
mode:
1000: All 8 bits are used.
100 or 10 MII: TXD<3:0> are used; TXD<7:4> are ignored.
10 Serial: TXD<0> is monitored; TXD<7:1> are ignored.
E18
TX_EN
I
Transmit Enable.
This synchronous input indicates that valid data is being driven on
the TXD bus.
D17
TX_CLK
O
Transmit Clock
. All transmit inputs must be synchronized to this output clock during
10/100 operation. It is provided as a utility clock during 1000 operation. Its frequency
depends on the link speed/mode:
100/1000 Mbps: 25 MHz
10 MII and Auto-negotiation: 2.5 MHz
10 Serial: 10 MHz
B17
GTX_CLK
I
Gigabit Transmit Clock
. 125 MHz input clock; all transmit inputs must be
synchronized to this clock during 1000 operation.
C18
TX_ER
I
Transmit Coding Error.
This synchronous input causes the transmission of error
symbols in 1000/100 links. For half-duplex 1000 links, it will cause the generation of
carrier-extension symbols when properly synchronized with TX_EN (refer to 1000
Mbps operation section).
1. I/O Column Coding: I = Input, O = Output
2. Complies with IEEE 802.3, Clauses 35.(GMII) and 22 (MII); Modes 1000 (GMII), 100 (MII), 10 (MII or Serial), Auto-
negotiation.
3. Complies with IEEE 802.3, Clause 36. NOTE: This section is an alternate listing of previously described pins.
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