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參數(shù)資料
| 型號： | LVT22V10-DD |
| 英文描述： | Fuse-Programmable PLD |
| 中文描述： | 保險絲，可編程的PLD |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 185K |
| 代理商： | LVT22V10-DD |
Philips Semiconductors
Product specification
LVT22V10
3V high speed, universal PLD device
1998 Feb 10
12
FUNCTIONAL DIAGRAM
OUTPUT
MACRO
CELL
CLK/I0
I1 – I11
F0
F1
F2
F3
F4
F5
F6
F7
F8
F9
PROGRAMMABLE AND ARRAY
(44
×
132)
1
11
8
10
12
14
16
16
14
12
10
8
SP00060A
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
OUTPUT
MACRO
CELL
R
P
Figure 1.
Functional Diagram
FUNCTIONAL DESCRIPTION
The LVT22V10 allows the systems engineer to implement the
design on-chip, by opening fuse links to configure AND and OR
gates within the device, according to the desired logic function.
Product terms with all fuses opened assume the logical HIGH state;
product terms connected to both True and Complement of any
single input assume the logical LOW state.
The LVT22V10 has 12 inputs and 10 I/O Macro Cells (Figure 1). The
Macro Cell allows one of four potential output configurations,
registered output or combinatorial I/O, Active-HIGH or Active-LOW
(see Figure 2). The configuration choice is made according to the
user’s design specification and corresponding programming of the
configuration bits S
0
–S
1
. Multiplexer controls are connected to
ground (0) through a programmable fuse link, selecting the “0” path
through the multiplexer. Programming the fuse disconnects the
control line from GND and it floats to V
CC
(1), selecting the “1” path.
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