參數(shù)資料
型號(hào)： LU3X54FTL
英文描述： QUAD-FET for 10Base-T/100Base-TX/FX
中文描述： 四核10Base-T/100Base-TX/FX場效應(yīng)管
文件頁數(shù)： 26/54頁
文件大小： 677K
代理商： LU3X54FTL
LU3X54FT
QUAD-FET for 10Base-T/100Base-TX/FX
Data Sheet
July 2000
26
Lucent Technologies Inc.
194
SPEEDLED[D]/
SPEED
I/O
Speed LED[D].
This pin indicates the operating speed of port D on the
LU3X54FT. A high on this pin indicates 100 Mbits/s operation. A low
indicates 10 Mbits/s operation. External buffers are necessary to drive
the LEDs.
Speed.
This pin is used at powerup or reset to select the operating
speed on all four channels and is the same function as register 0,
bit 13:
I
This pin is internally pulled high through a 100 k
resistor to enable
100 Mbits/s operation (defaults to 100 Mbits/s).
I
If this pin is pulled low through a 4.7 k
resistor, it will enable
10 Mbits/s operation.
This pin is ignored when autonegotiation is enabled. This pin and the
register bit are ANDed.
Speed LED[C].
This pin indicates the operating speed of port C on the
LU3X54FT. A high on this pin indicates 100 Mbits/s operation. A low
indicates 10 Mbits/s operation. External buffers are necessary to drive
the LEDs.
Smart Mode Select.
At powerup or reset, if this pin is pulled high
through a 4.7 k
resistor, the smart mode will be selected which
enables the use of the security feature and redefines the CRS, COL,
and TX_EN10 pins. This pin is internally pulled low through a 50 k
pull-down resistor. The default value is SMART_MODE _SELECT dis-
abled.
193
SPEEDLED[C]/
SMART_MODE_SELECT
I/O
When SMART_MODE_SELECT is asserted, the TX_EN10 inputs are
used as the security inputs for both 10 Mbits/s mode and 100 Mbits/s
mode. When security is activated high, the LU3X54FT will transmit a
jam signal instead of data.
When SMART_MODE_SELECT is asserted high, both the CRS_10
and CRS_100 signals will be output on the CRS_100 pins, and both
the COL_10 and COL_100 signals will be output on the COL_100 pins.
Speed LED[B].
This pin indicates the operating speed of port B on the
LU3X54FT. A high on this pin indicates 100 Mbits/s operation. A low
indicates 10 Mbits/s operation. External buffers are necessary to drive
the LEDs.
Bused MII Mode Select.
At powerup or reset, if the bused MII mode
select pin is pulled high through a 4.7 k
resistor, data streams from
ports running at 100 Mbits/s will appear on the single 100 Mbits/s MII
(port A), and data streams from ports running at 10 Mbits/s will appear
at the single 10 Mbits/s serial interface (port B). In addition, control sig-
nals TX_EN10, TX_EN100, RX_EN10, RX_EN100, CRS_10, and
CRS_100 become active.
192
SPEEDLED[B]/
BUSED_MII_MODE
I/O
This pin is internally pulled low through a 50 k
pull-down resistor. The
default value is bused mode disabled.
Pin Information
(continued)
Pin Descriptions
(continued)
Table 7. Miscellaneous Pins
(continued)
Pin
Signal
Type
Description
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