參數(shù)資料
型號: LU3X54FT
廠商: Lineage Power
英文描述: Quad-FET (Fast Ethernet Transceiver) for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器)
中文描述: 四場效應(yīng)管(快速以太網(wǎng)收發(fā)器)的10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)- T的和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器)
文件頁數(shù): 44/54頁
文件大小: 677K
代理商: LU3X54FT
LU3X54FT
QUAD-FET for 10Base-T/100Base-TX/FX
Data Sheet
July 2000
44
Lucent Technologies Inc.
Timing Characteristics (Preliminary)
(continued)
Table 30. MII Data Timing (25 pF Load)
* 100 Mbits/s only.
Name
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t11b
t12
t13
Parameter
Min
10/100
10/100
14/180
14/180
14/180
14/180
15/140
0/0
10
10
0
Typ
40
40
Max
26/220
26/220
26/220
26/220
170
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RXD[3:0], RX_ER, RX_DV Valid to RX_CLK High
RX_CLK High to RXD[3:0], RX_DV, RX_ER Invalid
RX_CLK High
RX_CLK Low
RX_CLK Period
TX_CLK High
TX_CLK Low
TX_CLK Period
TXD, TX_EN, TX_ER, Setup to TX_CLK
TXD, TX_EN, TX_ER, Hold to TX_CLK
TXD, TX_ER, Setup to LSCLK*
TX_EN Setup to LSCLK*
TXD, TX_EN, TX_ER, Hold to LSCLK*
First Bit of J on TPIN
±
While Transmitting Data to COL
Assert (half-duplex mode)
First Bit of T Received on TPIN
±
While Transmitting to COL
Deasserted (half-duplex mode)
t14
210
ns
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