參數(shù)資料
型號(hào): LTC4278CDKD#TRPBF
廠商: Linear Technology
文件頁(yè)數(shù): 31/42頁(yè)
文件大?。?/td> 0K
描述: IC PD IEEE 802.3AT 25.5W 32-DFN
標(biāo)準(zhǔn)包裝: 2,500
控制器類型: 供電設(shè)備接口控制器(PD)
接口: IEEE 802.3af
電源電壓: 4.5 V ~ 20 V
電流 - 電源: 6.4mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFDFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-DFN(7x4)裸露焊盤
包裝: 帶卷 (TR)
LTC4278
37
4278fc
One way to reduce cost and improve output ripple is to use
a simple LC filter. Figure 18 shows an example of the filter.
APPLICATIONS INFORMATION
unidirectional58Vtransientvoltagesuppressorbeinstalled
betweenthediodebridgeandtheLTC4278(D3inFigure2).
ISOLATION
The802.3standardrequiresEthernetportstobeelectrically
isolatedfromallotherconductorsthatareuseraccessible.
This includes the metal chassis, other connectors and
any auxiliary power connection. For PDs, there are two
common methods to meet the isolation requirement. If
there will be any user accessible connection to the PD,
then an isolated DC/DC converter is necessary to meet
the isolation requirements. If user connections can be
avoided, then it is possible to meet the safety requirement
by completely enclosing the PD in an insulated housing.
In all PD applications, there should be no user accessible
electrical connections to the LTC4278 or support circuitry
other than the RJ-45 port.
LAYOUT CONSIDERATIONS FOR THE LTC4278
The LTC4278’s PD front end is relatively immune to layout
problems. Excessive parasitic capacitance on the RCLASS
pin should be avoided. Include a PCB heat sink to which
the exposed pad on the bottom of the package can be
soldered. This heat sink should be electrically connected
to GND. For optimum thermal performance, make the
heat sink as large as possible. Voltages in a PD can be as
large as 57V for PoE applications, so high voltage layout
techniques should be employed. The SHDN pin should
be separated from other high voltage pins, like VPORTP,
VNEG, to avoid the possibility of leakage currents shutting
down the LTC4278. If not used, tie SHDN to VPORTN. The
load capacitor connected between VPORTP and VNEG of the
LTC4278 can store significant energy when fully charged.
The design of a PD must ensure that this energy is not
inadvertently dissipated in the LTC4278. The polarity-
protection diodes prevent an accidental short on the cable
from causing damage. However if, VPORTN is shorted
to VPORTP inside the PD while capacitor C1 is charged,
RLOAD
COUT2
1F
VOUT
COUT
470F
C1
47F
×3
FROM
SECONDARY
WINDING
L1, 0.1H
4278 F18
+
Figure 18.
The design of the filter is beyond the scope of this data
sheet. However, as a starting point, use these general
guidelines. Start with a COUT 1/4 the size of the nonfilter
solution. Make C1 1/4 of COUT to make the second filter
pole independent of COUT. C1 may be best implemented
with multiple ceramic capacitors. Make L1 smaller than
the output inductance of the transformer. In general, a
0.1H filter inductor is sufficient. Add a small ceramic
capacitor (COUT2) for high frequency noise on VOUT. For
those interested in more details refer to “Second-Stage
LC Filter Design,” Ridley, Switching Power Magazine, July
2000 p8-10.
Circuit simulation is a way to optimize output capacitance
and filters, just make sure to include the component
parasitic. LTC SwitcherCAD is a terrific free circuit
simulation tool that is available at www.linear.com. Final
optimization of output ripple must be done on a dedicated
PC board. Parasitic inductance due to poor layout can
significantly impact ripple. Refer to the PC Board Layout
section for more details.
ELECTRO STATIC DISCHARGE AND SURGE
PROTECTION
The LTC4278 is specified to operate with an absolute
maximum voltage of –100V and is designed to tolerate
brief overvoltage events. However, the pins that interface
to the outside world (primarily VPORTN and VPORTP) can
routinely see peak voltages in excess of 10kV. To protect
the LTC4278, it is highly recommended that the SMAJ58A
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