- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11576 > LTC4278CDKD#TRPBF (Linear Technology)IC PD IEEE 802.3AT 25.5W 32-DFN PDF資料下載
參數(shù)資料
| 型號： | LTC4278CDKD#TRPBF |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 27/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PD IEEE 802.3AT 25.5W 32-DFN |
| 標準包裝： | 2,500 |
| 控制器類型： | 供電設(shè)備接口控制器（PD） |
| 接口： | IEEE 802.3af |
| 電源電壓： | 4.5 V ~ 20 V |
| 電流 - 電源： | 6.4mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-DFN（7x4）裸露焊盤 |
| 包裝： | 帶卷 (TR) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
LTC4278
33
4278fc
In further contrast to traditional current mode switch-
ers, VCMP pin ripple is generally not an issue with the
LTC4269-1. The dynamic nature of the clamped feedback
amplifier forms an effective track/hold type response,
whereby the VCMP voltage changes during the flyback
pulse, but is then held during the subsequent switch-on
portion of the next cycle. This action naturally holds the
VCMP voltage stable during the current comparator sense
action (current mode switching).
Application Note 19 provides a method for empirically
tweaking frequency compensation. Basically, it involves
introducing a load current step and monitoring the
response.
Slope Compensation
The LTC4278 incorporates current slope compensation.
Slope compensation is required to ensure current loop
stabilitywhentheDCisgreaterthan50%.Insomeswitching
regulators,slopecompensationreducesthemaximumpeak
current at higher duty cycles. The LTC4278 eliminates this
problembyhavingcircuitrythatcompensatesfortheslope
compensation so that maximum current sense voltage is
constant across all duty cycles.
Minimum Load Considerations
At light loads, the LTC4278 derived regulator goes into
forced continuous conduction mode. The primary-side
switch always turns on for a short time as set by the
tON(MIN) resistor. If this produces more power than the
load requires, power will flow back into the primary dur-
ing the off period when the synchronization switch is on.
This does not produce any inherently adverse problems,
although light load efficiency is reduced.
Maximum Load Considerations
The current mode control uses the VCMP node voltage and
amplified sense resistor voltage as inputs to the current
comparator.Whentheamplifiedsensevoltageexceedsthe
VCMP node voltage, the primary-side switch is turned off.
In normal use, the peak switch current increases while
FB is below the internal reference. This continues until
VCMP reaches its 2.56V clamp. At clamp, the primary-side
MOSFET will turn off at the rated 100mV VSENSE level. This
repeats on the next cycle.
It is possible for the peak primary switch currents as
referred across RSENSE to exceed the max 100mV rating
because of the minimum switch on time blanking. If the
voltage on VSENSE exceeds 205mV after the minimum
turn-on time, the SFST capacitor is discharged, causing
the discharge of the VCMP capacitor. This then reduces
the peak current on the next cycle and will reduce overall
stress in the primary switch.
Short-Circuit Conditions
Loss of current limit is possible under certain conditions
such as an output short-circuit. If the duty cycle exhibited
by the minimum on-time is greater than the ratio of
secondary winding voltage (referred-to-primary) divided
by input voltage, then peak current is not controlled at
the nominal value. It ratchets up cycle-by-cycle to some
higher level. Expressed mathematically, the requirement
to maintain short-circuit control is:
DCMIN = tON(MIN) fOSC <
ISC RSEC + RDS(ON)
(
)
VIN NSP
where:
tON(MIN) is the primary-side switch minimum on-time
ISC is the short-circuit output current
NSP is the secondary-to-primary turns ratio (NSEC/NPRI)
(other variables as previously defined)
Trouble is typically encountered only in applications with
a relatively high product of input voltage times secondary
to primary turns ratio and/or a relatively long minimum
switchontime.Additionally,severalrealworldeffectssuch
as transformer leakage inductance, AC winding losses and
output switch voltage drop combine to make this simple
theoretical calculation a conservative estimate. Prudent
APPLICATIONS INFORMATION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| V300A8C400BF | CONVERTER MOD DC/DC 8V 400W |
| PIC16HV785T-I/ML | IC PIC MCU FLASH 2KX14 20QFN |
| V300A8C400BL3 | CONVERTER MOD DC/DC 8V 400W |
| PIC16HV785-I/P | IC PIC MCU FLASH 2KX14 20DIP |
| V300A8C400BL2 | CONVERTER MOD DC/DC 8V 400W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC4278IDKD | 制造商:LINER 制造商全稱:Linear Technology 功能描述:IEEE 802.3at PD with Synchronous No-Opto Flyback Controller and 12V Aux Support |
| LTC4278IDKD#PBF | 功能描述:IC PD IEEE 802.3AT 25.5W 32-DFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:2,450 系列:- 控制器類型:SPI 總線至 I²C 總線橋接 接口:I²C，串行，SPI 電源電壓:2.4 V ~ 3.6 V 電流 - 電源:11mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-HVQFN（4x4） 包裝:托盤 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名稱:935286452157SC18IS600IBSSC18IS600IBS-ND |
| LTC4278IDKD#TRPBF | 功能描述:IC PD IEEE 802.3AT 25.5W 32-DFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:2,450 系列:- 控制器類型:SPI 總線至 I²C 總線橋接 接口:I²C，串行，SPI 電源電壓:2.4 V ~ 3.6 V 電流 - 電源:11mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-HVQFN（4x4） 包裝:托盤 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名稱:935286452157SC18IS600IBSSC18IS600IBS-ND |
| LTC4278IDKDPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:IEEE 802.3at PD with Synchronous No-Opto Flyback Controller and 12V Aux Support |
| LTC4278IDKDTRPBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:IEEE 802.3at PD with Synchronous No-Opto Flyback Controller and 12V Aux Support |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。